| Message ID | 1286492633-26885-13-git-send-email-ddaney@caviumnetworks.com |
|---|---|
| State | Not Applicable |
| Delegated to: | David Miller |
| Headers | show |
On Thu, Oct 07, 2010 at 04:03:51PM -0700, David Daney wrote: > The creation of the I/O clock domain requires some adjustments. Since > the CF bus timing logic is clocked by the I/O clock, use its rate for > delay calculations. > > Signed-off-by: David Daney <ddaney@caviumnetworks.com> > Cc: Jeff Garzik <jgarzik@pobox.com> > Cc: linux-ide@vger.kernel.org Haven't seen any ack yet but I assume due to the dependencies on other MIPS patches it'll be ok if I merge this through the MIPS tree, so I queued it for 2.6.37. Thanks! Ralf -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 10/11/2010 09:43 AM, Ralf Baechle wrote: > On Thu, Oct 07, 2010 at 04:03:51PM -0700, David Daney wrote: > >> The creation of the I/O clock domain requires some adjustments. Since >> the CF bus timing logic is clocked by the I/O clock, use its rate for >> delay calculations. >> >> Signed-off-by: David Daney<ddaney@caviumnetworks.com> >> Cc: Jeff Garzik<jgarzik@pobox.com> >> Cc: linux-ide@vger.kernel.org > > Haven't seen any ack yet but I assume due to the dependencies on other > MIPS patches it'll be ok if I merge this through the MIPS tree, so I > queued it for 2.6.37. yep, Acked-by: Jeff Garzik <jgarzik@redhat.com> -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/ata/pata_octeon_cf.c b/drivers/ata/pata_octeon_cf.c index 06ddd91..74b8298 100644 --- a/drivers/ata/pata_octeon_cf.c +++ b/drivers/ata/pata_octeon_cf.c @@ -60,7 +60,7 @@ static unsigned int ns_to_tim_reg(unsigned int tim_mult, unsigned int nsecs) * Compute # of eclock periods to get desired duration in * nanoseconds. */ - val = DIV_ROUND_UP(nsecs * (octeon_get_clock_rate() / 1000000), + val = DIV_ROUND_UP(nsecs * (octeon_get_io_clock_rate() / 1000000), 1000 * tim_mult); return val;
The creation of the I/O clock domain requires some adjustments. Since the CF bus timing logic is clocked by the I/O clock, use its rate for delay calculations. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Jeff Garzik <jgarzik@pobox.com> Cc: linux-ide@vger.kernel.org --- drivers/ata/pata_octeon_cf.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)