diff mbox

RFC: linux-user-i386: crash on cpuid

Message ID 1077308097.1320619.1474038394482.JavaMail.zimbra@redhat.com
State New
Headers show

Commit Message

Marc-Andre Lureau Sept. 16, 2016, 3:06 p.m. UTC
Hi

----- Original Message -----
> >  
> > -#ifndef CONFIG_USER_ONLY
> > +#ifdef CONFIG_USER_ONLY
> > +    cs->nr_cores = smp_cores;
> > +    cs->nr_threads = smp_threads;
> > +#else
> 
> On CONFIG_USER_ONLY, smp_cores and smp_threads are defined as:
> 
>   /* *-user doesn't have configurable SMP topology */
>   #define smp_cores   1
>   #define smp_threads 1
> 
> It sounds simpler to just set nr_cores and nr_threads to 1 by
> default in cpu_common_initfn(). (Preferably with a comment noting
> that the default value is changed by qemu_init_vcpu() for
> softmmu).

Any reason those define exists? It seems we could use cpu state values instead, ex:

Comments

Eduardo Habkost Sept. 16, 2016, 4:52 p.m. UTC | #1
On Fri, Sep 16, 2016 at 11:06:34AM -0400, Marc-André Lureau wrote:
> Hi
> 
> ----- Original Message -----
> > >  
> > > -#ifndef CONFIG_USER_ONLY
> > > +#ifdef CONFIG_USER_ONLY
> > > +    cs->nr_cores = smp_cores;
> > > +    cs->nr_threads = smp_threads;
> > > +#else
> > 
> > On CONFIG_USER_ONLY, smp_cores and smp_threads are defined as:
> > 
> >   /* *-user doesn't have configurable SMP topology */
> >   #define smp_cores   1
> >   #define smp_threads 1
> > 
> > It sounds simpler to just set nr_cores and nr_threads to 1 by
> > default in cpu_common_initfn(). (Preferably with a comment noting
> > that the default value is changed by qemu_init_vcpu() for
> > softmmu).
> 
> Any reason those define exists? It seems we could use cpu state values instead, ex:

Just because there was existing non-softmmu-specific code that
used those variables. If we eliminate their usage (are the ones
below the only cases?), we can remove the macros.

> 
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -2490,13 +2490,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>  
>          switch (count) {
>          case 0:
> -            *eax = apicid_core_offset(smp_cores, smp_threads);
> -            *ebx = smp_threads;
> +            *eax = apicid_core_offset(cs->nr_cores, cs->nr_threads);
> +            *ebx = cs->nr_threads;
>              *ecx |= CPUID_TOPOLOGY_LEVEL_SMT;
>              break;
>          case 1:
> -            *eax = apicid_pkg_offset(smp_cores, smp_threads);
> -            *ebx = smp_cores * smp_threads;
> +            *eax = apicid_pkg_offset(cs->nr_cores, cs->nr_threads);
> +            *ebx = cs->nr_cores * cs->nr_threads;
>              *ecx |= CPUID_TOPOLOGY_LEVEL_CORE;
>              break;
>
diff mbox

Patch

--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2490,13 +2490,13 @@  void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
 
         switch (count) {
         case 0:
-            *eax = apicid_core_offset(smp_cores, smp_threads);
-            *ebx = smp_threads;
+            *eax = apicid_core_offset(cs->nr_cores, cs->nr_threads);
+            *ebx = cs->nr_threads;
             *ecx |= CPUID_TOPOLOGY_LEVEL_SMT;
             break;
         case 1:
-            *eax = apicid_pkg_offset(smp_cores, smp_threads);
-            *ebx = smp_cores * smp_threads;
+            *eax = apicid_pkg_offset(cs->nr_cores, cs->nr_threads);
+            *ebx = cs->nr_cores * cs->nr_threads;
             *ecx |= CPUID_TOPOLOGY_LEVEL_CORE;
             break;