@@ -167,7 +167,8 @@
#define OPAL_INT_EOI 124
#define OPAL_INT_SET_MFRR 125
#define OPAL_PCI_TCE_KILL 126
-#define OPAL_LAST 126
+#define OPAL_PCI_GET_PHB_CAPI_MODE 128
+#define OPAL_LAST 128
/* Device tree flags */
@@ -228,6 +228,7 @@ int64_t opal_pci_tce_kill(uint64_t phb_id, uint32_t kill_type,
int64_t opal_rm_pci_tce_kill(uint64_t phb_id, uint32_t kill_type,
uint32_t pe_num, uint32_t tce_size,
uint64_t dma_addr, uint32_t npages);
+int64_t opal_pci_get_phb_capi_mode(uint64_t phb_id);
/* Internal functions */
extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
@@ -308,3 +308,4 @@ OPAL_CALL(opal_int_eoi, OPAL_INT_EOI);
OPAL_CALL(opal_int_set_mfrr, OPAL_INT_SET_MFRR);
OPAL_CALL(opal_pci_tce_kill, OPAL_PCI_TCE_KILL);
OPAL_CALL_REAL(opal_rm_pci_tce_kill, OPAL_PCI_TCE_KILL);
+OPAL_CALL(opal_pci_get_phb_capi_mode, OPAL_PCI_GET_PHB_CAPI_MODE);
opal_pci_get_phb_capi_mode() returns OPAL_PHB_CAPI_MODE_CAPI if the PHB is in CAPI mode, and OPAL_PHB_CAPI_MODE_PCIE if it isn't. We're going to use this call to determine if a PHB requires a complete reset during initialisation in order to disable CAPI mode (on sufficiently new skiboots that support this). Signed-off-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> --- Corresponding skiboot RFC: http://patchwork.ozlabs.org/patch/670781/ --- arch/powerpc/include/asm/opal-api.h | 3 ++- arch/powerpc/include/asm/opal.h | 1 + arch/powerpc/platforms/powernv/opal-wrappers.S | 1 + 3 files changed, 4 insertions(+), 1 deletion(-)