From patchwork Thu Oct 7 02:23:18 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 66993 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id B107CB6EFF for ; Thu, 7 Oct 2010 13:23:29 +1100 (EST) Received: (qmail 6127 invoked by alias); 7 Oct 2010 02:23:27 -0000 Received: (qmail 6118 invoked by uid 22791); 7 Oct 2010 02:23:26 -0000 X-SWARE-Spam-Status: No, hits=1.3 required=5.0 tests=AWL, BAYES_00, MEDICAL_SUBJECT, NO_DNS_FOR_FROM, TW_XF, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 07 Oct 2010 02:23:20 +0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 06 Oct 2010 19:23:19 -0700 X-ExtLoop1: 1 Received: from gnu-6.sc.intel.com ([10.3.194.135]) by orsmga002.jf.intel.com with ESMTP; 06 Oct 2010 19:23:19 -0700 Received: by gnu-6.sc.intel.com (Postfix, from userid 500) id B07DF207F1; Wed, 6 Oct 2010 19:23:18 -0700 (PDT) Date: Wed, 6 Oct 2010 19:23:18 -0700 From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak Subject: PATCH: PR target/45913: [4.6 Regression] ICE: in insn_default_length, at config/i386/i386.md:584 with -fselective-scheduling2 -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops Message-ID: <20101007022318.GA21000@intel.com> Reply-To: "H.J. Lu" MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-12-10) Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, ix86_binary_operator_ok failed to check "andhi/andsi/anddi" as a zero-extending move. OK to install if there are no regressions on Linux/ia32 and Linux/x86-64? Thanks. H.J. --- gcc/ 2010-10-06 H.J. Lu PR target/45913 * config/i386/i386.c (ix86_binary_operator_ok): Support "andhi/andsi/anddi" as a zero-extending move. gcc/testsuite/ 2010-10-06 H.J. Lu PR target/45913 * gcc.target/i386/pr45913.c: New. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 0998f31..b4a5748 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -14987,7 +14987,16 @@ ix86_binary_operator_ok (enum rtx_code code, enum machine_mode mode, /* Source 1 cannot be a non-matching memory. */ if (MEM_P (src1) && !rtx_equal_p (dst, src1)) - return false; + { + /* Support "andhi/andsi/anddi" as a zero-extending move. */ + return (code == AND + && (mode == HImode + || mode == SImode + || (TARGET_64BIT && mode == DImode)) + && CONST_INT_P (src2) + && (INTVAL (src2) == 0xff + || INTVAL (src2) == 0xffff)); + } return true; } --- /dev/null 2010-09-15 11:43:08.091350194 -0700 +++ gcc/gcc/testsuite/gcc.target/i386/pr45913.c 2010-10-06 19:05:40.114285874 -0700 @@ -0,0 +1,23 @@ +/* PR target/45913 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fselective-scheduling2 -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops" } */ + +extern void bar (int, int); + +int ss[128]; + +void +foo (int i, int j, int k, int *p1, int *p2) +{ + int s[128]; + __builtin_memcpy (s, ss, sizeof s); + + while (i--) + { + int a = s[i]; + while (j--) + bar (k, p2[a]); + j = s[i] & 0xFF; + bar (p1[a], k); + } +}