diff mbox

[3/3] target-arm: cache most tbflags

Message ID 1473847013-20191-4-git-send-email-pbonzini@redhat.com
State New
Headers show

Commit Message

Paolo Bonzini Sept. 14, 2016, 9:56 a.m. UTC 
Finally, this patch makes most flags static.  The only remaining
dynamic flags (only used in aarch32 mode) are for Thumb mode and
conditional execution.  These are modified more often than the
others, and are cheap therefore they are looked up directly from
env on every TB lookup.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 target-arm/cpu.h | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)
diff mbox

Patch

diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 5918df5..0b72740 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -2320,17 +2320,15 @@  static inline bool arm_cpu_bswap_data(CPUARMState *env)
 }
 #endif
 
-static inline uint32_t cpu_dynamic_tb_cpu_flags(CPUARMState *env)
+static inline uint32_t cpu_get_tb_cpu_flags(CPUARMState *env)
 {
     uint32_t flags = 0;
 
     if (is_a64(env)) {
         flags |= ARM_TBFLAG_AARCH64_STATE_MASK;
     } else {
-        flags |= (env->thumb << ARM_TBFLAG_THUMB_SHIFT)
-            | (env->vfp.vec_len << ARM_TBFLAG_VECLEN_SHIFT)
+        flags |= (env->vfp.vec_len << ARM_TBFLAG_VECLEN_SHIFT)
             | (env->vfp.vec_stride << ARM_TBFLAG_VECSTRIDE_SHIFT)
-            | (env->condexec_bits << ARM_TBFLAG_CONDEXEC_SHIFT)
             | (arm_sctlr_b(env) << ARM_TBFLAG_SCTLR_B_SHIFT);
         if (!(access_secure_reg(env))) {
             flags |= ARM_TBFLAG_NS_MASK;
@@ -2371,10 +2369,15 @@  static inline uint32_t cpu_dynamic_tb_cpu_flags(CPUARMState *env)
     return flags;
 }
 
-static inline uint32_t cpu_get_tb_cpu_flags(CPUARMState *env)
+static inline uint32_t cpu_dynamic_tb_cpu_flags(CPUARMState *env)
 {
     uint32_t flags = 0;
 
+    if (!is_a64(env)) {
+        flags |= (env->thumb << ARM_TBFLAG_THUMB_SHIFT)
+            | (env->condexec_bits << ARM_TBFLAG_CONDEXEC_SHIFT);
+    }
+
     return flags;
 }