Patchwork Optimize (subreg ([al]shiftrt (mem) (const_int N))) (PR tree-optimization/45903)

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Submitter Jakub Jelinek
Date Oct. 6, 2010, 3:23 p.m.
Message ID <20101006152326.GI4127@tyan-ft48-01.lab.bos.redhat.com>
Download mbox | patch
Permalink /patch/66939/
State New
Headers show

Comments

Jakub Jelinek - Oct. 6, 2010, 3:23 p.m.
Hi!

This patch optimizes a subreg of a right shift of MEM similarly
how we optimize subreg of a MEM.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2010-10-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/45903
	* simplify-rtx.c (simplify_subreg): Optimize SUBREG of *SHIFTRT
	of MEM.

	* gcc.target/i386/pr45903.c: New test.


	Jakub
Eric Botcazou - Oct. 8, 2010, 8:29 p.m.
> 2010-10-06  Jakub Jelinek  <jakub@redhat.com>
>
> 	PR tree-optimization/45903
> 	* simplify-rtx.c (simplify_subreg): Optimize SUBREG of *SHIFTRT
> 	of MEM.
>
> 	* gcc.target/i386/pr45903.c: New test.

OK, but mention in the comment that it's only for the low part.

Patch

--- gcc/simplify-rtx.c.jj	2010-09-22 17:15:41.000000000 +0200
+++ gcc/simplify-rtx.c	2010-10-06 14:08:02.000000000 +0200
@@ -5482,6 +5482,31 @@  simplify_subreg (enum machine_mode outer
 				   : byte + shifted_bytes));
     }
 
+  /* If we have a SUBREG of a right shift of MEM, make a new MEM and try
+     replacing the SUBREG and shift with it.  Don't do this if the MEM has a
+     mode-dependent address or if we would be widening it.  */
+
+  if ((GET_CODE (op) == LSHIFTRT
+       || GET_CODE (op) == ASHIFTRT)
+      && MEM_P (XEXP (op, 0))
+      && CONST_INT_P (XEXP (op, 1))
+      && GET_MODE_SIZE (outermode) < GET_MODE_SIZE (GET_MODE (op))
+      && (INTVAL (XEXP (op, 1)) % GET_MODE_BITSIZE (outermode)) == 0
+      && INTVAL (XEXP (op, 1)) > 0
+      && INTVAL (XEXP (op, 1)) < GET_MODE_BITSIZE (innermode)
+      && ! mode_dependent_address_p (XEXP (XEXP (op, 0), 0))
+      && ! MEM_VOLATILE_P (XEXP (op, 0))
+      && byte == subreg_lowpart_offset (outermode, innermode)
+      && (GET_MODE_SIZE (outermode) >= UNITS_PER_WORD
+	  || WORDS_BIG_ENDIAN == BYTES_BIG_ENDIAN))
+    {
+      int shifted_bytes = INTVAL (XEXP (op, 1)) / BITS_PER_UNIT;
+      return adjust_address_nv (XEXP (op, 0), outermode,
+				(WORDS_BIG_ENDIAN
+				 ? byte - shifted_bytes
+				 : byte + shifted_bytes));
+    }
+
   return NULL_RTX;
 }
 
--- gcc/testsuite/gcc.target/i386/pr45903.c.jj	2010-10-06 14:34:35.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/pr45903.c	2010-10-06 14:35:19.000000000 +0200
@@ -0,0 +1,44 @@ 
+/* PR tree-optimization/45903 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+unsigned long long a, b;
+unsigned char c;
+
+void
+f1 (void)
+{
+  c = (a >> 8) + (b >> 8);
+}
+
+void
+f2 (void)
+{
+  c = (a >> 8) | (b >> 8);
+}
+
+void
+f3 (void)
+{
+  c = (a >> 16) ^ (b >> 56);
+}
+
+unsigned char
+f4 (void)
+{
+  return (a >> 48) + (b >> 40);
+}
+
+unsigned char
+f5 (void)
+{
+  return (a >> 32) | (b >> 16);
+}
+
+unsigned char
+f6 (void)
+{
+  return (a >> 24) ^ (b >> 32);
+}
+
+/* { dg-final { scan-assembler-not "shr\[qdl\]" } } */