From patchwork Sun Sep 11 14:54:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 668474 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sXDfj5PN2z9s3T for ; Mon, 12 Sep 2016 01:01:33 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=vGZ+I7pI; dkim-atps=neutral Received: from localhost ([::1]:37932 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bj6GB-0001nV-Cn for incoming@patchwork.ozlabs.org; Sun, 11 Sep 2016 11:01:31 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37431) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bj6AZ-0005Nw-NA for qemu-devel@nongnu.org; Sun, 11 Sep 2016 10:55:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bj6AU-0004ME-Nw for qemu-devel@nongnu.org; Sun, 11 Sep 2016 10:55:42 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:33128) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bj6AU-0004M8-Ex for qemu-devel@nongnu.org; Sun, 11 Sep 2016 10:55:38 -0400 Received: by mail-pf0-f196.google.com with SMTP id 128so6762234pfb.0 for ; Sun, 11 Sep 2016 07:55:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=i+hMGhUUKJ/uSW72uf7954oPcE+BltdjOsui8E8k5qE=; b=vGZ+I7pI/2gp5eihJZJS8GXKPR+CDPpAxpvHDYDrXDSrf1gqHACy+wjDb+d9smnNpX GdDalkx47vLgzZ7mgsvA+t9S4a7sS9fZDFXZjN46HCxAUoQ8iU3GMe0pCNVo78kpzwSS rx2C6+Do5/p2LkwJKR7TKtHd40g22vmAD5Fs9p24ld80tYc6VLBVvfzKjRKXSKXP74l3 4PUZteEp+jUuUnUH1PaRx7MHs2Ii0GO3ylxnZpX06A5n/to9noqNDCaMbCRKrdRx9Ews TZuF/PxIkOiyy3H4wMhyX3kRmWBu0UZPCpbw6QtIInCwc2XdHiWz7uStzRLPNHw7NFP+ qBRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=i+hMGhUUKJ/uSW72uf7954oPcE+BltdjOsui8E8k5qE=; b=F0GM84q+YUFfZqDgLTuG7uwSBrdZkUp+LUl11uyxmVjfU9Zx6q+IS3v/1A2+mhQKad 4nYoE7E8IKzRj8e6bg8jyGN7jZ8icHOCgBcdxvTMEIx7CGHrxbQMvg91i842vlbtc0A4 1XUU3FhCjBfCwkWnjnOjncgVFGKcLTRo5HxTf7+YzH+L8IfjwSa4X7r+/CuU1vh1CT5o sgquXluCglw3hnX71yNh82Tu6C0QAy18ymRA0Tu1ZaVXVkCL+kRk2cl8HIdFn6zlNZfo zOU3ul0N6Jl9ylewn3KurVF/bLgTvcEVh/Xjpq7YbKDPbJcTDBqXH8wfH0X57YjWwD3s xa/g== X-Gm-Message-State: AE9vXwPM2lRkh+UeaShbJ84S4hVluulikzUBktHU82P281nxPma1T6atoe7xH5v35DQQ+w== X-Received: by 10.98.91.197 with SMTP id p188mr25024613pfb.101.1473605677667; Sun, 11 Sep 2016 07:54:37 -0700 (PDT) Received: from localhost ([2601:646:8581:937e:2561:c199:6f8f:8bc8]) by smtp.gmail.com with ESMTPSA id s63sm18168911pfb.52.2016.09.11.07.54.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 11 Sep 2016 07:54:37 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Sun, 11 Sep 2016 07:54:36 -0700 Message-Id: <205da95af533852a5d5df02ee541e73cfe219362.1473579576.git.alistair@alistair23.me> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.192.196 Subject: [Qemu-devel] [PATCH v7 1/8] STM32F205: Remove the individual device variables X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, konstanty@ieee.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Cleanup the individual DeviceState and SysBusDevice variables to re-use the same variable for each device. Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite --- hw/arm/stm32f205_soc.c | 35 +++++++++++++++++------------------ 1 file changed, 17 insertions(+), 18 deletions(-) diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index de26b8c..5b6fa3b 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -62,8 +62,8 @@ static void stm32f205_soc_initfn(Object *obj) static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) { STM32F205State *s = STM32F205_SOC(dev_soc); - DeviceState *syscfgdev, *usartdev, *timerdev, *nvic; - SysBusDevice *syscfgbusdev, *usartbusdev, *timerbusdev; + DeviceState *dev, *nvic; + SysBusDevice *busdev; Error *err = NULL; int i; @@ -94,44 +94,43 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) s->kernel_filename, s->cpu_model); /* System configuration controller */ - syscfgdev = DEVICE(&s->syscfg); + dev = DEVICE(&s->syscfg); object_property_set_bool(OBJECT(&s->syscfg), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); return; } - syscfgbusdev = SYS_BUS_DEVICE(syscfgdev); - sysbus_mmio_map(syscfgbusdev, 0, 0x40013800); - sysbus_connect_irq(syscfgbusdev, 0, qdev_get_gpio_in(nvic, 71)); + busdev = SYS_BUS_DEVICE(dev); + sysbus_mmio_map(busdev, 0, 0x40013800); + sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(nvic, 71)); /* Attach UART (uses USART registers) and USART controllers */ for (i = 0; i < STM_NUM_USARTS; i++) { - usartdev = DEVICE(&(s->usart[i])); - qdev_prop_set_chr(usartdev, "chardev", i < MAX_SERIAL_PORTS ? serial_hds[i] : NULL); + dev = DEVICE(&(s->usart[i])); + qdev_prop_set_chr(dev, "chardev", + i < MAX_SERIAL_PORTS ? serial_hds[i] : NULL); object_property_set_bool(OBJECT(&s->usart[i]), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); return; } - usartbusdev = SYS_BUS_DEVICE(usartdev); - sysbus_mmio_map(usartbusdev, 0, usart_addr[i]); - sysbus_connect_irq(usartbusdev, 0, - qdev_get_gpio_in(nvic, usart_irq[i])); + busdev = SYS_BUS_DEVICE(dev); + sysbus_mmio_map(busdev, 0, usart_addr[i]); + sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(nvic, usart_irq[i])); } /* Timer 2 to 5 */ for (i = 0; i < STM_NUM_TIMERS; i++) { - timerdev = DEVICE(&(s->timer[i])); - qdev_prop_set_uint64(timerdev, "clock-frequency", 1000000000); + dev = DEVICE(&(s->timer[i])); + qdev_prop_set_uint64(dev, "clock-frequency", 1000000000); object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); return; } - timerbusdev = SYS_BUS_DEVICE(timerdev); - sysbus_mmio_map(timerbusdev, 0, timer_addr[i]); - sysbus_connect_irq(timerbusdev, 0, - qdev_get_gpio_in(nvic, timer_irq[i])); + busdev = SYS_BUS_DEVICE(dev); + sysbus_mmio_map(busdev, 0, timer_addr[i]); + sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(nvic, timer_irq[i])); } }