| Message ID | 1473335853-32102-1-git-send-email-horms+renesas@verge.net.au |
|---|---|
| State | New |
| Headers | show |
On Thu, Sep 8, 2016 at 1:57 PM, Simon Horman <horms+renesas@verge.net.au> wrote: > This patch supports the {get,set}_io_voltage operations of SDHI. > > This operates the POCCTRL0 register on R8A7796 SoC and makes 1.8v/3.3v > voltage switch. > > Based on work by Takeshi Kihara and Wolfram Sang. > > Cc: Wolfram Sang <wsa+renesas@sang-engineering.com> > Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Sep 08, 2016 at 01:57:33PM +0200, Simon Horman wrote: > This patch supports the {get,set}_io_voltage operations of SDHI. > > This operates the POCCTRL0 register on R8A7796 SoC and makes 1.8v/3.3v > voltage switch. > > Based on work by Takeshi Kihara and Wolfram Sang. > > Cc: Wolfram Sang <wsa+renesas@sang-engineering.com> > Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
On Fri, Sep 09, 2016 at 10:24:55AM +0200, Geert Uytterhoeven wrote: > On Thu, Sep 8, 2016 at 1:57 PM, Simon Horman <horms+renesas@verge.net.au> wrote: > > This patch supports the {get,set}_io_voltage operations of SDHI. > > > > This operates the POCCTRL0 register on R8A7796 SoC and makes 1.8v/3.3v > > voltage switch. > > > > Based on work by Takeshi Kihara and Wolfram Sang. > > > > Cc: Wolfram Sang <wsa+renesas@sang-engineering.com> > > Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com> > > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Thanks, will you queue this up? -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Simon, On Fri, Sep 9, 2016 at 5:06 PM, Simon Horman <horms@verge.net.au> wrote: > On Fri, Sep 09, 2016 at 10:24:55AM +0200, Geert Uytterhoeven wrote: >> On Thu, Sep 8, 2016 at 1:57 PM, Simon Horman <horms+renesas@verge.net.au> wrote: >> > This patch supports the {get,set}_io_voltage operations of SDHI. >> > >> > This operates the POCCTRL0 register on R8A7796 SoC and makes 1.8v/3.3v >> > voltage switch. >> > >> > Based on work by Takeshi Kihara and Wolfram Sang. >> > >> > Cc: Wolfram Sang <wsa+renesas@sang-engineering.com> >> > Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com> >> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> >> >> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > Thanks, will you queue this up? Yes, I will, on Monday. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c index f8ab74dd0506..dc9b671ccf2e 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c @@ -23,8 +23,12 @@ PORT_GP_16(0, fn, sfx), \ PORT_GP_29(1, fn, sfx), \ PORT_GP_15(2, fn, sfx), \ - PORT_GP_16(3, fn, sfx), \ - PORT_GP_18(4, fn, sfx), \ + PORT_GP_CFG_12(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ + PORT_GP_1(3, 12, fn, sfx), \ + PORT_GP_1(3, 13, fn, sfx), \ + PORT_GP_1(3, 14, fn, sfx), \ + PORT_GP_1(3, 15, fn, sfx), \ + PORT_GP_CFG_18(4, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ PORT_GP_26(5, fn, sfx), \ PORT_GP_32(6, fn, sfx), \ PORT_GP_4(7, fn, sfx) @@ -2627,8 +2631,28 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = { { }, }; +static int r8a7796_pin_to_pocctrl(struct sh_pfc *pfc, unsigned int pin, u32 *pocctrl) +{ + int bit = -EINVAL; + + *pocctrl = 0xe6060380; + + if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11)) + bit = pin & 0x1f; + + if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 17)) + bit = (pin & 0x1f) + 12; + + return bit; +} + +static const struct sh_pfc_soc_operations r8a7796_pinmux_ops = { + .pin_to_pocctrl = r8a7796_pin_to_pocctrl, +}; + const struct sh_pfc_soc_info r8a7796_pinmux_info = { .name = "r8a77960_pfc", + .ops = &r8a7796_pinmux_ops, .unlock_reg = 0xe6060000, /* PMMR */ .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
This patch supports the {get,set}_io_voltage operations of SDHI. This operates the POCCTRL0 register on R8A7796 SoC and makes 1.8v/3.3v voltage switch. Based on work by Takeshi Kihara and Wolfram Sang. Cc: Wolfram Sang <wsa+renesas@sang-engineering.com> Cc: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> --- drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-)