Patchwork ide: set WCACHE supported in IDENTIFY data

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Submitter Christoph Hellwig
Date Oct. 4, 2010, 1:29 p.m.
Message ID <20101004132941.GA26834@lst.de>
Download mbox | patch
Permalink /patch/66669/
State New
Headers show

Comments

Christoph Hellwig - Oct. 4, 2010, 1:29 p.m.
ATA does not only have the WCACHE enabled bit in identify word 85, but also
a WCACHE supported bit in word 82.  While the Linux kernel is fine with the
latter at least hdparm also needs the former before correctly displaying
the cache settings.  There's also a non-zero chance other operating systems
are more picky in their volatile write cache detection.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Kevin Wolf - Oct. 8, 2010, 12:03 p.m.
Am 04.10.2010 15:29, schrieb Christoph Hellwig:
> ATA does not only have the WCACHE enabled bit in identify word 85, but also
> a WCACHE supported bit in word 82.  While the Linux kernel is fine with the
> latter at least hdparm also needs the former before correctly displaying
> the cache settings.  There's also a non-zero chance other operating systems
> are more picky in their volatile write cache detection.
> 
> Signed-off-by: Christoph Hellwig <hch@lst.de>

Thanks, applied to the block branch.

Kevin

Patch

Index: qemu/hw/ide/core.c
===================================================================
--- qemu.orig/hw/ide/core.c	2010-10-04 15:22:26.848003542 +0200
+++ qemu/hw/ide/core.c	2010-10-04 15:24:11.900255468 +0200
@@ -146,8 +146,8 @@  static void ide_identify(IDEState *s)
     put_le16(p + 68, 120);
     put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
     put_le16(p + 81, 0x16); /* conforms to ata5 */
-    /* 14=NOP supported, 0=SMART supported */
-    put_le16(p + 82, (1 << 14) | 1);
+    /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
+    put_le16(p + 82, (1 << 14) | (1 << 5) | 1);
     /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
     put_le16(p + 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
     /* 14=set to 1, 1=SMART self test, 0=SMART error logging */