From patchwork Sun Oct 3 13:07:26 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [i386] : Improve _mask splitters X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 66598 Message-Id: To: gcc-patches@gcc.gnu.org Date: Sun, 3 Oct 2010 15:07:26 +0200 From: Uros Bizjak List-Id: Hello! Attached patch gives combine pass some more freedom when creating shifts with implicit count mask. 2010-10-03 Uros Bizjak * config/i386/i386.md (*ashl3_mask): Change operand 2 preticate to nonimmediate_operand. Force operand 2 to register when allowed. (*3_mask): Ditto. (*3_mask): Ditto. Tested on x86_64-pc-linux-gnu {,-m32}, committed to mainline. Uros. Index: i386.md =================================================================== --- i386.md (revision 164905) +++ i386.md (working copy) @@ -9152,14 +9152,13 @@ }) ;; Avoid useless masking of count operand. - (define_insn_and_split "*ashl3_mask" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm") (ashift:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0") (subreg:QI (and:SI - (match_operand:SI 2 "register_operand" "c") + (match_operand:SI 2 "nonimmediate_operand" "c") (match_operand:SI 3 "const_int_operand" "n")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (ASHIFT, mode, operands) @@ -9170,7 +9169,12 @@ [(parallel [(set (match_dup 0) (ashift:SWI48 (match_dup 1) (match_dup 2))) (clobber (reg:CC FLAGS_REG))])] - "operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0);" +{ + if (can_create_pseudo_p ()) + operands [2] = force_reg (SImode, operands[2]); + + operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0); +} [(set_attr "type" "ishift") (set_attr "mode" "")]) @@ -9714,14 +9718,13 @@ "ix86_expand_binary_operator (, mode, operands); DONE;") ;; Avoid useless masking of count operand. - (define_insn_and_split "*3_mask" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm") (any_shiftrt:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0") (subreg:QI (and:SI - (match_operand:SI 2 "register_operand" "c") + (match_operand:SI 2 "nonimmediate_operand" "c") (match_operand:SI 3 "const_int_operand" "n")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (, mode, operands) @@ -9732,7 +9735,12 @@ [(parallel [(set (match_dup 0) (any_shiftrt:SWI48 (match_dup 1) (match_dup 2))) (clobber (reg:CC FLAGS_REG))])] - "operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0);" +{ + if (can_create_pseudo_p ()) + operands [2] = force_reg (SImode, operands[2]); + + operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0); +} [(set_attr "type" "ishift") (set_attr "mode" "")]) @@ -10089,14 +10097,13 @@ "ix86_expand_binary_operator (, mode, operands); DONE;") ;; Avoid useless masking of count operand. - (define_insn_and_split "*3_mask" [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm") (any_rotate:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0") (subreg:QI (and:SI - (match_operand:SI 2 "register_operand" "c") + (match_operand:SI 2 "nonimmediate_operand" "c") (match_operand:SI 3 "const_int_operand" "n")) 0))) (clobber (reg:CC FLAGS_REG))] "ix86_binary_operator_ok (, mode, operands) @@ -10107,7 +10114,12 @@ [(parallel [(set (match_dup 0) (any_rotate:SWI48 (match_dup 1) (match_dup 2))) (clobber (reg:CC FLAGS_REG))])] - "operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0);" +{ + if (can_create_pseudo_p ()) + operands [2] = force_reg (SImode, operands[2]); + + operands[2] = simplify_gen_subreg (QImode, operands[2], SImode, 0); +} [(set_attr "type" "rotate") (set_attr "mode" "")])