diff mbox

[U-Boot] armv7: ls102xa: add lowlevel init

Message ID 1472712481-6422-1-git-send-email-xiaoliang.yang@nxp.com
State Superseded
Delegated to: York Sun
Headers show

Commit Message

Xiaoliang Yang Sept. 1, 2016, 6:48 a.m. UTC
Add lowlevel init in ls102xa, and delete the CONFIG_SKIP_LOWLEVEL_INIT
define in ls1021atwr.h

Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com>
---
 arch/arm/cpu/armv7/Makefile      | 2 +-
 arch/arm/cpu/armv7/ls102xa/soc.c | 4 ++++
 include/configs/ls1021atwr.h     | 1 -
 3 files changed, 5 insertions(+), 2 deletions(-)

Comments

York Sun Sept. 1, 2016, 4:26 p.m. UTC | #1
On 08/31/2016 11:59 PM, Xiaoliang Yang wrote:
> Add lowlevel init in ls102xa, and delete the CONFIG_SKIP_LOWLEVEL_INIT
> define in ls1021atwr.h

Why do you need lowlevel_init now, but not before?

York
York Sun Sept. 2, 2016, 3:23 a.m. UTC | #2
On 09/01/2016 07:32 PM, Xiaoliang Yang wrote:
> Hi York,
>
> We need enable i-cache in low level in order to improve u-boot running speed.
> We have skipped lowlevel_init because a silicon bug before. (it could not run some instructions in lowlevel_init until DDR init, the bug has already fixed.)

Xiaoliang,

Can you be more specific about the bug? You said it is fixed, how about 
existing SoCs? Will existing SoCs run into any issue with the lowlevel_init?

York
Xiaoliang Yang Sept. 2, 2016, 3:38 a.m. UTC | #3
Hi york,

The silicon bug was existing in V1.0 of SoCs, we have already not supported them.


Xiaoliang Yang 


-----Original Message-----
From: york sun 
Sent: Friday, September 02, 2016 11:24 AM
To: Xiaoliang Yang; u-boot@lists.denx.de
Subject: Re: [PATCH] armv7: ls102xa: add lowlevel init

On 09/01/2016 07:32 PM, Xiaoliang Yang wrote:
> Hi York,
>
> We need enable i-cache in low level in order to improve u-boot running speed.
> We have skipped lowlevel_init because a silicon bug before. (it could 
> not run some instructions in lowlevel_init until DDR init, the bug has 
> already fixed.)

Xiaoliang,

Can you be more specific about the bug? You said it is fixed, how about existing SoCs? Will existing SoCs run into any issue with the lowlevel_init?

York
York Sun Sept. 2, 2016, 3:44 a.m. UTC | #4
On 09/01/2016 08:39 PM, Xiaoliang Yang wrote:
> Hi york,
>
> The silicon bug was existing in V1.0 of SoCs, we have already not supported them.

No good. SDK may not support it, but ss long as we have users with rev 1 
SoC, we need to support it in U-Boot. You can add revision check and 
skip lowever_init for older SoCs.

York


>
>
> Xiaoliang Yang
>
>
> -----Original Message-----
> From: york sun
> Sent: Friday, September 02, 2016 11:24 AM
> To: Xiaoliang Yang; u-boot@lists.denx.de
> Subject: Re: [PATCH] armv7: ls102xa: add lowlevel init
>
> On 09/01/2016 07:32 PM, Xiaoliang Yang wrote:
>> Hi York,
>>
>> We need enable i-cache in low level in order to improve u-boot running speed.
>> We have skipped lowlevel_init because a silicon bug before. (it could
>> not run some instructions in lowlevel_init until DDR init, the bug has
>> already fixed.)
>
> Xiaoliang,
>
> Can you be more specific about the bug? You said it is fixed, how about existing SoCs? Will existing SoCs run into any issue with the lowlevel_init?
>
> York
>
>
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 0d4bfbc..c1eeefd 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,7 +12,7 @@  obj-y	+= cache_v7.o cache_v7_asm.o
 obj-y	+= cpu.o cp15.o
 obj-y	+= syslib.o
 
-ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA),)
+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_LS102XA),)
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y	+= lowlevel_init.o
 endif
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index b1b0c71..659a2d0 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -58,6 +58,10 @@  unsigned int get_soc_major_rev(void)
 	return major;
 }
 
+void s_init(void)
+{
+}
+
 int arch_soc_init(void)
 {
 	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 2f19950..f62ac7f 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -20,7 +20,6 @@ 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
 
-#define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_DEEP_SLEEP
 #ifdef CONFIG_DEEP_SLEEP