diff mbox

[U-Boot,1/2] rtl8169: fix cache misalignment message on transmit.

Message ID 20160830011529.13988-1-Peter.Chubb@data61.csiro.au
State Accepted
Commit 7377647a3678c50c1913f05d8ad8d685b05e52d1
Delegated to: Joe Hershberger
Headers show

Commit Message

Chubb, Peter (Data61, Eveleigh) Aug. 30, 2016, 1:15 a.m. UTC
The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.

Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.

Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
---
 drivers/net/rtl8169.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Joe Hershberger Sept. 2, 2016, 1:03 p.m. UTC | #1
On Mon, Aug 29, 2016 at 8:15 PM,  <Peter.Chubb@data61.csiro.au> wrote:
> The call to flush cache on the transmit buffer was misplaced (for very
> short packets) and asked to flush less than a cacheline.
>
> Move the flush cache call to after a short packet has been padded
> to minimum length (so the padding is flushed too), and round the size
> up to a cacheline.
>
> Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
diff mbox

Patch

diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 1cc0b40..a3f4423 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -629,11 +629,12 @@  static int rtl_send_common(pci_dev_t dev, unsigned long dev_iobase,
 	/* point to the current txb incase multiple tx_rings are used */
 	ptxb = tpc->Tx_skbuff[entry * MAX_ETH_FRAME_SIZE];
 	memcpy(ptxb, (char *)packet, (int)length);
-	rtl_flush_buffer(ptxb, length);
 
 	while (len < ETH_ZLEN)
 		ptxb[len++] = '\0';
 
+	rtl_flush_buffer(ptxb, ALIGN(len, RTL8169_ALIGN));
+
 	tpc->TxDescArray[entry].buf_Haddr = 0;
 #ifdef CONFIG_DM_ETH
 	tpc->TxDescArray[entry].buf_addr = cpu_to_le32(