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[U-Boot,1/8] drivers/ddr/fsl: add DEBUG_38

Message ID 1472210916-36539-2-git-send-email-Qianyu.Gong@nxp.com
State Superseded
Delegated to: York Sun
Headers show

Commit Message

Gong Qianyu Aug. 26, 2016, 11:28 a.m. UTC
From: Mingkai Hu <mingkai.hu@nxp.com>

DEBUG_38 is needed for rev2 DDR controller.

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
---
 drivers/ddr/fsl/ctrl_regs.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

York Sun Aug. 26, 2016, 2:59 p.m. UTC | #1
On 08/26/2016 04:40 AM, Gong Qianyu wrote:
> From: Mingkai Hu <mingkai.hu@nxp.com>
>
> DEBUG_38 is needed for rev2 DDR controller.
>
> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
> ---
>  drivers/ddr/fsl/ctrl_regs.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
> index 24fd366..4ae8b80 100644
> --- a/drivers/ddr/fsl/ctrl_regs.c
> +++ b/drivers/ddr/fsl/ctrl_regs.c
> @@ -2526,5 +2526,7 @@ compute_fsl_memctl_config_regs(const unsigned int ctrl_num,
>  		ddr->debug[2] |= 0x00000200;	/* set bit 22 */
>  #endif
>
> +	ddr->debug[37] = 0x80000000;
> +

NAK. You can't simply add a new register without checking if it exists 
on older controllers.

York
Shengzhou Liu Aug. 29, 2016, 10:51 a.m. UTC | #2
> -----Original Message-----
> From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Gong
> Qianyu
> Sent: Friday, August 26, 2016 7:28 PM
> To: u-boot@lists.denx.de; york sun <york.sun@nxp.com>
> Cc: Zhiqiang Hou <zhiqiang.hou@nxp.com>; Wenbin Song
> <wenbin.song@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>
> Subject: [U-Boot] [PATCH 1/8] drivers/ddr/fsl: add DEBUG_38
> 
> From: Mingkai Hu <mingkai.hu@nxp.com>
> 
> DEBUG_38 is needed for rev2 DDR controller.
> 
> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
> ---
>  drivers/ddr/fsl/ctrl_regs.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index
> 24fd366..4ae8b80 100644
> --- a/drivers/ddr/fsl/ctrl_regs.c
> +++ b/drivers/ddr/fsl/ctrl_regs.c
> @@ -2526,5 +2526,7 @@ compute_fsl_memctl_config_regs(const
> unsigned int ctrl_num,
>  		ddr->debug[2] |= 0x00000200;	/* set bit 22 */
>  #endif
> 
> +	ddr->debug[37] = 0x80000000;
> +

This temporary patch is no needed, just drop it.
it needs patch http://patchwork.ozlabs.org/patch/663535/
Mingkai Hu Aug. 30, 2016, 4:29 a.m. UTC | #3
> -----Original Message-----
> From: york sun
> Sent: Friday, August 26, 2016 11:00 PM
> To: Qianyu Gong <qianyu.gong@nxp.com>; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>; Mingkai Hu
> <mingkai.hu@nxp.com>; Shaohui Xie <shaohui.xie@nxp.com>; Zhiqiang Hou
> <zhiqiang.hou@nxp.com>; Wenbin Song <wenbin.song@nxp.com>
> Subject: Re: [PATCH 1/8] drivers/ddr/fsl: add DEBUG_38
> 
> On 08/26/2016 04:40 AM, Gong Qianyu wrote:
> > From: Mingkai Hu <mingkai.hu@nxp.com>
> >
> > DEBUG_38 is needed for rev2 DDR controller.
> >
> > Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
> > Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
> > ---
> >  drivers/ddr/fsl/ctrl_regs.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
> > index 24fd366..4ae8b80 100644
> > --- a/drivers/ddr/fsl/ctrl_regs.c
> > +++ b/drivers/ddr/fsl/ctrl_regs.c
> > @@ -2526,5 +2526,7 @@ compute_fsl_memctl_config_regs(const
> unsigned int ctrl_num,
> >  		ddr->debug[2] |= 0x00000200;	/* set bit 22 */
> >  #endif
> >
> > +	ddr->debug[37] = 0x80000000;
> > +
> 
> NAK. You can't simply add a new register without checking if it exists on older
> controllers.
> 
> York

Thanks, York. This is not needed and will remove it in next version.

Thanks,
Mingkai
diff mbox

Patch

diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 24fd366..4ae8b80 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -2526,5 +2526,7 @@  compute_fsl_memctl_config_regs(const unsigned int ctrl_num,
 		ddr->debug[2] |= 0x00000200;	/* set bit 22 */
 #endif
 
+	ddr->debug[37] = 0x80000000;
+
 	return check_fsl_memctl_config_regs(ddr);
 }