| Message ID | 1472040021-16381-2-git-send-email-rogerq@ti.com |
|---|---|
| State | Superseded |
| Delegated to: | Joe Hershberger |
| Headers | show |
On 24/08/16 15:00, Roger Quadros wrote: > From: Lokesh Vutla <lokeshvutla@ti.com> > > Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> > --- > arch/arm/include/asm/arch-omap5/cpu.h | 3 +++ > drivers/net/cpsw.c | 3 ++- > 2 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/include/asm/arch-omap5/cpu.h b/arch/arm/include/asm/arch-omap5/cpu.h > index 683d905..c1f1874 100644 > --- a/arch/arm/include/asm/arch-omap5/cpu.h > +++ b/arch/arm/include/asm/arch-omap5/cpu.h > @@ -123,9 +123,12 @@ struct watchdog { > #define GMII2_SEL_MII (GMII1_SEL_MII << 4) > #define GMII2_SEL_RMII (GMII1_SEL_RMII << 4) > #define GMII2_SEL_RGMII (GMII1_SEL_RGMII << 4) > +#define RMII1_IO_CLK_EN BIT(6) > +#define RMII2_IO_CLK_EN BIT(7) > > #define MII_MODE_ENABLE (GMII1_SEL_MII | GMII2_SEL_MII) > #define RMII_MODE_ENABLE (GMII1_SEL_RMII | GMII2_SEL_RMII) > #define RGMII_MODE_ENABLE (GMII1_SEL_RGMII | GMII2_SEL_RGMII) > +#define RMII_CHIPCKL_ENABLE (RMII1_IO_CLK_EN | RMII2_IO_CLK_EN) > > #endif /* _CPU_H */ > diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c > index 81ccc61..f1c424c 100644 > --- a/drivers/net/cpsw.c > +++ b/drivers/net/cpsw.c > @@ -1298,7 +1298,8 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev) > writel(MII_MODE_ENABLE, priv->data.gmii_sel); > break; > case PHY_INTERFACE_MODE_RMII: > - writel(RMII_MODE_ENABLE, priv->data.gmii_sel); > + writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, > + priv->data.gmii_sel); > break; > case PHY_INTERFACE_MODE_RGMII: > case PHY_INTERFACE_MODE_RGMII_ID: > Lokesh just pointed out that this is being undone in patch 2. I'll drop this patch and send a v2. cheers, -roger
diff --git a/arch/arm/include/asm/arch-omap5/cpu.h b/arch/arm/include/asm/arch-omap5/cpu.h index 683d905..c1f1874 100644 --- a/arch/arm/include/asm/arch-omap5/cpu.h +++ b/arch/arm/include/asm/arch-omap5/cpu.h @@ -123,9 +123,12 @@ struct watchdog { #define GMII2_SEL_MII (GMII1_SEL_MII << 4) #define GMII2_SEL_RMII (GMII1_SEL_RMII << 4) #define GMII2_SEL_RGMII (GMII1_SEL_RGMII << 4) +#define RMII1_IO_CLK_EN BIT(6) +#define RMII2_IO_CLK_EN BIT(7) #define MII_MODE_ENABLE (GMII1_SEL_MII | GMII2_SEL_MII) #define RMII_MODE_ENABLE (GMII1_SEL_RMII | GMII2_SEL_RMII) #define RGMII_MODE_ENABLE (GMII1_SEL_RGMII | GMII2_SEL_RGMII) +#define RMII_CHIPCKL_ENABLE (RMII1_IO_CLK_EN | RMII2_IO_CLK_EN) #endif /* _CPU_H */ diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index 81ccc61..f1c424c 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -1298,7 +1298,8 @@ static int cpsw_eth_ofdata_to_platdata(struct udevice *dev) writel(MII_MODE_ENABLE, priv->data.gmii_sel); break; case PHY_INTERFACE_MODE_RMII: - writel(RMII_MODE_ENABLE, priv->data.gmii_sel); + writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, + priv->data.gmii_sel); break; case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_ID: