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RCS file: /cvs/gcc/wwwdocs/htdocs/projects/prefetch.html,v
retrieving revision 1.27
@@ -800,15 +800,11 @@
<p><a name="ref_14">[14]</a>
<em>PowerPC Microprocessor 32-bit Family: The Programming Environments</em>,
-page 5-8; a PostScript file with a link from
-<a href="https://www-01.ibm.com/chips/techlib/techlib.nsf/products/PowerPC_EM603e_Microprocessor">
-https://www-01.ibm.com/chips/techlib/techlib.nsf/products/PowerPC_EM603e_Microprocessor</a>.</p>
+page 5-8.</p>
<p><a name="ref_15">[15]</a>
<em>The SPARC Architecture Manual</em>, Version 9, SPARC International,
-SAV09R1459912, 1994-2000; a compressed PostScript file with a link from
-<a href="http://www.sparc.org/specificationsDocuments.html">
-http://www.sparc.org/specificationsDocuments.html</a>; see A.42.</p>
+SAV09R1459912, 1994-2000; see A.42.</p>
<p><a name="ref_16">[16]</a>
<em>SuperH[tm] RISC Engine SH-3/SH-3E/SH3-DSP Programming Manual</em>,
@@ -861,9 +857,7 @@
<em>An Overview of the Intel IA-64 Compiler</em>,
Carole Dulong, Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel Lavery,
Wei Li, John Ng, and David Sehr, all of Microcomputer Software Laboratory,
-Intel Corporation, <em>Intel Technology Journal</em>, 4th quarter 1999;
-<a href="http://developer.intel.com/technology/itj/q41999/articles/art_1h.htm">
-http://developer.intel.com/technology/itj/q41999/articles/art_1h.htm</a></p>
+Intel Corporation, <em>Intel Technology Journal</em>, 4th quarter 1999.</p>
<p><a name="ref_26">[26]</a>
<em>UltraSPARC[tm]-II Enhancements: Support for Software Controlled