Message ID | 1471661617-26432-1-git-send-email-shawn.lin@rock-chips.com |
---|---|
State | Not Applicable, archived |
Headers | show |
Hi, Am Samstag, 20. August 2016, 10:53:37 schrieb Shawn Lin: > This patch to add a generic PHY driver for rockchip PCIe PHY. > Access the PHY via registers provided by GRF (general register > files) module. > > Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> seems I'm late to the party, but when looking if I can apply the pcie- devicetree patches, I found that the phy is still pending. Apart from some error-message nitpicks below, this looks ok to me. I don't know enough about the actual pci phy part though. Kishon, is this on your radar? [...] > +static int rockchip_pcie_phy_power_off(struct phy *phy) > +{ > + struct rockchip_pcie_phy *rk_phy = phy_get_drvdata(phy); > + int err = 0; > + > + err = reset_control_assert(rk_phy->phy_rst); > + if (err) { > + pr_err("assert phy_rst err %d\n", err); dev_err(phy->dev, ...) probably the same for all other pr_err invocations > + return err; > + } > + > + return 0; > +} [...] > +static const struct of_device_id rockchip_pcie_phy_dt_ids[] = { > + { > + .compatible = "rockchip,rk3399-pcie-phy", > + .data = &rk3399_pcie_data, > + }, > + {} > +}; > + > +MODULE_DEVICE_TABLE(of, rockchip_pcie_phy_dt_ids); > + > +static int rockchip_pcie_phy_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + struct rockchip_pcie_phy *rk_phy; > + struct phy *generic_phy; > + struct phy_provider *phy_provider; > + struct regmap *grf; > + const struct of_device_id *of_id; > + > + grf = syscon_node_to_regmap(dev->parent->of_node); > + if (IS_ERR(grf)) { > + dev_err(dev, "Missing rockchip,grf property\n"); dev_err(dev, "Cannot find GRF syscon\n"); Heiko -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wednesday 31 August 2016 07:38 PM, Heiko Stübner wrote: > Hi, > > Am Samstag, 20. August 2016, 10:53:37 schrieb Shawn Lin: >> This patch to add a generic PHY driver for rockchip PCIe PHY. >> Access the PHY via registers provided by GRF (general register >> files) module. >> >> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> > > seems I'm late to the party, but when looking if I can apply the pcie- > devicetree patches, I found that the phy is still pending. > > Apart from some error-message nitpicks below, this looks ok to me. I don't > know enough about the actual pci phy part though. > > Kishon, is this on your radar? yes.. can the nipicks be fixed and posted asap? Thanks Kishon > > [...] > >> +static int rockchip_pcie_phy_power_off(struct phy *phy) >> +{ >> + struct rockchip_pcie_phy *rk_phy = phy_get_drvdata(phy); >> + int err = 0; >> + >> + err = reset_control_assert(rk_phy->phy_rst); >> + if (err) { >> + pr_err("assert phy_rst err %d\n", err); > > dev_err(phy->dev, ...) > > probably the same for all other pr_err invocations > > >> + return err; >> + } >> + >> + return 0; >> +} > > [...] > >> +static const struct of_device_id rockchip_pcie_phy_dt_ids[] = { >> + { >> + .compatible = "rockchip,rk3399-pcie-phy", >> + .data = &rk3399_pcie_data, >> + }, >> + {} >> +}; >> + >> +MODULE_DEVICE_TABLE(of, rockchip_pcie_phy_dt_ids); >> + >> +static int rockchip_pcie_phy_probe(struct platform_device *pdev) >> +{ >> + struct device *dev = &pdev->dev; >> + struct rockchip_pcie_phy *rk_phy; >> + struct phy *generic_phy; >> + struct phy_provider *phy_provider; >> + struct regmap *grf; >> + const struct of_device_id *of_id; >> + >> + grf = syscon_node_to_regmap(dev->parent->of_node); >> + if (IS_ERR(grf)) { >> + dev_err(dev, "Missing rockchip,grf property\n"); > > dev_err(dev, "Cannot find GRF syscon\n"); > > > Heiko > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt new file mode 100644 index 0000000..aedca29 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt @@ -0,0 +1,32 @@ +Rockchip PCIE PHY +----------------------- + +Required properties: + - compatible: rockchip,rk3399-pcie-phy + - #phy-cells: must be 0 + - clocks: Must contain an entry in clock-names. + See ../clocks/clock-bindings.txt for details. + - clock-names: Must be "refclk" + - resets: Must contain an entry in reset-names. + See ../reset/reset.txt for details. + - reset-names: Must be "phy" + +Example: + +grf: syscon@ff770000 { + compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + + ... + + pcie_phy: pcie-phy { + compatible = "rockchip,rk3399-pcie-phy"; + #phy-cells = <0>; + clocks = <&cru SCLK_PCIEPHY_REF>; + clock-names = "refclk"; + resets = <&cru SRST_PCIEPHY>; + reset-names = "phy"; + }; +}; +