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[04/13] Documentation: add BCM6348 pincontroller binding documentation

Message ID 1471604025-21575-5-git-send-email-jonas.gorski@gmail.com
State Changes Requested, archived
Headers show

Commit Message

Jonas Gorski Aug. 19, 2016, 10:53 a.m. UTC
Add binding documentation for the pincontrol core found in BCM6348 SoCs.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
---
 .../bindings/pinctrl/brcm,bcm6348-pinctrl.txt      | 32 ++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt

Comments

Linus Walleij Aug. 22, 2016, 1:17 p.m. UTC | #1
On Fri, Aug 19, 2016 at 12:53 PM, Jonas Gorski <jonas.gorski@gmail.com> wrote:

> Add binding documentation for the pincontrol core found in BCM6348 SoCs.
>
> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>

(...)
> +pinctrl: pin-controller@fffe0080 {
> +       compatible = "brcm,bcm6348-pinctrl";
> +       reg = <0xfffe0080 0x8>,
> +             <0xfffe0088 0x8>,
> +             <0xfffe0098 0x4>;
> +       reg-names = "dirout", "dat", "mode";
> +
> +       gpio-controller;
> +       #gpio-cells = <2>;
> +};

So I would prefer if you create a syscon with two
children: the pin controller and the GPIO(s) as
separate devices using "syscon", "mfd-simple" as
compatible on the top node.

Yours,
Linus Walleij
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
new file mode 100644
index 0000000..3df7f30
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
@@ -0,0 +1,32 @@ 
+* Broadcom BCM6348 pin controller
+
+Required properties:
+- compatible: Must be "brcm,bcm6348-pinctrl".
+- reg: register Specifiers of dirout, dat, mode registers.
+- reg-names: Must be "dirout", "dat", "mode".
+- gpio-controller: Identifies this node as a GPIO controller.
+- #gpio-cells: Must be <2>.
+
+Example:
+
+pinctrl: pin-controller@fffe0080 {
+	compatible = "brcm,bcm6348-pinctrl";
+	reg = <0xfffe0080 0x8>,
+	      <0xfffe0088 0x8>,
+	      <0xfffe0098 0x4>;
+	reg-names = "dirout", "dat", "mode";
+
+	gpio-controller;
+	#gpio-cells = <2>;
+};
+
+Available pins/groups and functions:
+
+name		pins	functions
+-----------------------------------------------------------
+group0		32-36	ext_mii, utopia, diag
+group1		22-31	ext_ephy, mii_snoop, mii_pccard,
+			spi_master_uart, utopia, diag
+group2		16-21	pci, diag
+group3		8-15	ext_mii, utopia
+group4		0-7	ext_ephy, mii_snoop, legacy_led, diag