From patchwork Wed Sep 29 16:43:19 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anatoly Sokolov X-Patchwork-Id: 66077 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 50806B711B for ; Thu, 30 Sep 2010 02:44:45 +1000 (EST) Received: (qmail 6043 invoked by alias); 29 Sep 2010 16:44:20 -0000 Received: (qmail 5807 invoked by uid 22791); 29 Sep 2010 16:44:12 -0000 X-SWARE-Spam-Status: No, hits=1.3 required=5.0 tests=AWL, BAYES_00, KAM_THEBAT, RCVD_IN_DNSWL_NONE, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from contrabass.post.ru (HELO contrabass.post.ru) (85.21.78.5) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 29 Sep 2010 16:42:45 +0000 Received: from corbina.ru (mail.post.ru [195.14.50.16]) by contrabass.post.ru (Postfix) with ESMTP id B2155C5B3 for ; Wed, 29 Sep 2010 20:42:41 +0400 (MSD) Received: from [89.178.33.172] (account aesok@post.ru HELO Vista.corbina.ru) by corbina.ru (CommuniGate Pro SMTP 5.1.14) with ESMTPA id 261752045 for gcc-patches@gcc.gnu.org; Wed, 29 Sep 2010 20:42:41 +0400 Date: Wed, 29 Sep 2010 20:43:19 +0400 From: Anatoly Sokolov Message-ID: <13998155.20100929204319@post.ru> To: gcc-patches@gcc.gnu.org Subject: [PATCH] Remove CLASS_LIKELY_SPILLED_P macro from the GCC MIME-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hello. This patch remove CLASS_LIKELY_SPILLED_P from the GCC. The C_L_S_P macro used in the m68hc11 back end, now. Patch to hookize C_L_S_P macro in the m68hc11 back end is posted in: http://gcc.gnu.org/ml/gcc-patches/2010-09/msg01584.html Bootstrapped on x86_64-unknown-linux-gnu. OK to install, after the m68hc11 patch will be committed? * doc/tm.texi.in (CLASS_LIKELY_SPILLED_P): Remove documentation. * doc/tm.texi.in: Regenerate. * system.h (CLASS_LIKELY_SPILLED_P): Poison. * targhooks.c (default_class_likely_spilled_p): Don't use the CLASS_LIKELY_SPILLED_P macro. * config\arm\arm.md: Update comment. Anatoly. Index: gcc/doc/tm.texi =================================================================== --- gcc/doc/tm.texi (revision 164725) +++ gcc/doc/tm.texi (working copy) @@ -2852,24 +2852,6 @@ allocation. @end deftypefn -@defmac CLASS_LIKELY_SPILLED_P (@var{class}) -A C expression whose value is nonzero if pseudos that have been assigned -to registers of class @var{class} would likely be spilled because -registers of @var{class} are needed for spill registers. - -The default value of this macro returns 1 if @var{class} has exactly one -register and zero otherwise. On most machines, this default should be -used. Only define this macro to some other expression if pseudos -allocated by @file{local-alloc.c} end up in memory because their hard -registers were needed for spill registers. If this macro returns nonzero -for those classes, those pseudos will only be allocated by -@file{global.c}, which knows how to reallocate the pseudo to another -register. If there would not be another register available for -reallocation, you should not change the definition of this macro since -the only effect of such a definition would be to slow down register -allocation. -@end defmac - @defmac CLASS_MAX_NREGS (@var{class}, @var{mode}) A C expression for the maximum number of consecutive registers of class @var{class} needed to hold a value of mode @var{mode}. Index: gcc/doc/tm.texi.in =================================================================== --- gcc/doc/tm.texi.in (revision 164725) +++ gcc/doc/tm.texi.in (working copy) @@ -2852,24 +2852,6 @@ allocation. @end deftypefn -@defmac CLASS_LIKELY_SPILLED_P (@var{class}) -A C expression whose value is nonzero if pseudos that have been assigned -to registers of class @var{class} would likely be spilled because -registers of @var{class} are needed for spill registers. - -The default value of this macro returns 1 if @var{class} has exactly one -register and zero otherwise. On most machines, this default should be -used. Only define this macro to some other expression if pseudos -allocated by @file{local-alloc.c} end up in memory because their hard -registers were needed for spill registers. If this macro returns nonzero -for those classes, those pseudos will only be allocated by -@file{global.c}, which knows how to reallocate the pseudo to another -register. If there would not be another register available for -reallocation, you should not change the definition of this macro since -the only effect of such a definition would be to slow down register -allocation. -@end defmac - @defmac CLASS_MAX_NREGS (@var{class}, @var{mode}) A C expression for the maximum number of consecutive registers of class @var{class} needed to hold a value of mode @var{mode}. Index: gcc/targhooks.c =================================================================== --- gcc/targhooks.c (revision 164725) +++ gcc/targhooks.c (working copy) @@ -1226,11 +1226,7 @@ bool default_class_likely_spilled_p (reg_class_t rclass) { -#ifndef CLASS_LIKELY_SPILLED_P return (reg_class_size[(int) rclass] == 1); -#else - return CLASS_LIKELY_SPILLED_P ((enum reg_class) rclass); -#endif } /* Determine the debugging unwind mechanism for the target. */ Index: gcc/system.h =================================================================== --- gcc/system.h (revision 164725) +++ gcc/system.h (working copy) @@ -716,7 +716,7 @@ CAN_ELIMINATE TRAMPOLINE_TEMPLATE INITIALIZE_TRAMPOLINE \ TRAMPOLINE_ADJUST_ADDRESS STATIC_CHAIN STATIC_CHAIN_INCOMING \ RETURN_POPS_ARGS UNITS_PER_SIMD_WORD OVERRIDE_OPTIONS \ - OPTIMIZATION_OPTIONS \ + OPTIMIZATION_OPTIONS CLASS_LIKELY_SPILLED_P \ USING_SJLJ_EXCEPTIONS TARGET_UNWIND_INFO /* Other obsolete target macros, or macros that used to be in target Index: gcc/config/arm/arm.md =================================================================== --- gcc/config/arm/arm.md (revision 164725) +++ gcc/config/arm/arm.md (working copy) @@ -6671,7 +6671,7 @@ ;; Sigh! This variant shouldn't be needed, but combine often fails to ;; merge cases like this because the op1 is a hard register in -;; CLASS_LIKELY_SPILLED_P. +;; arm_class_likely_spilled_p. (define_peephole2 [(set (match_operand:SI 0 "low_register_operand" "") (match_operand:SI 1 "low_register_operand" ""))