diff mbox

[U-Boot,2/6] ARM: at91: clock: correct PRES offset for at91sam9x5

Message ID 1471418009-12660-3-git-send-email-hs@denx.de
State Accepted
Commit 806a5a3958e4af483e529cf0db75464055d6e13a
Delegated to: Andreas Bießmann
Headers show

Commit Message

Heiko Schocher Aug. 17, 2016, 7:13 a.m. UTC
on at91sam9x5 PRES offset is 4 in the PMC master
clock register.

Signed-off-by: Heiko Schocher <hs@denx.de>
---

 arch/arm/mach-at91/arm926ejs/clock.c | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Wenyou Yang Sept. 18, 2016, 2:11 a.m. UTC | #1
> -----Original Message-----

> From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Heiko

> Schocher

> Sent: 2016年8月17日 15:13

> To: U-Boot Mailing List <u-boot@lists.denx.de>

> Cc: Bo Shen <voice.shen@atmel.com>

> Subject: [U-Boot] [PATCH 2/6] ARM: at91: clock: correct PRES offset for

> at91sam9x5

> 

> on at91sam9x5 PRES offset is 4 in the PMC master clock register.

> 

> Signed-off-by: Heiko Schocher <hs@denx.de>


Acked-by: Wenyou Yang <wenyou.yang@atmel.com>


> ---

> 

>  arch/arm/mach-at91/arm926ejs/clock.c | 6 ++++++

>  1 file changed, 6 insertions(+)

> 

> diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-

> at91/arm926ejs/clock.c

> index c8d24ae..e3181fa 100644

> --- a/arch/arm/mach-at91/arm926ejs/clock.c

> +++ b/arch/arm/mach-at91/arm926ejs/clock.c

> @@ -162,7 +162,13 @@ int at91_clock_init(unsigned long main_clock)

>  	gd->arch.mck_rate_hz = at91_css_to_rate(mckr &

> AT91_PMC_MCKR_CSS_MASK);

>  	freq = gd->arch.mck_rate_hz;

> 

> +#if defined(CONFIG_AT91SAM9X5)

> +	/* different in prescale on at91sam9x5 */

> +	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 4)); #else

>  	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2));	/*

> prescale */

> +#endif

> +

>  #if defined(CONFIG_AT91SAM9G20)

>  	/* mdiv ; (x >> 7) = ((x >> 8) * 2) */

>  	gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?

> --

> 2.5.5

> 

> _______________________________________________

> U-Boot mailing list

> U-Boot@lists.denx.de

> http://lists.denx.de/mailman/listinfo/u-boot
Andreas Bießmann Oct. 6, 2016, 9:40 p.m. UTC | #2
On 17.08.16 09:13, Heiko Schocher wrote:
> on at91sam9x5 PRES offset is 4 in the PMC master
> clock register.
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> ---
> 
>  arch/arm/mach-at91/arm926ejs/clock.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c
> index c8d24ae..e3181fa 100644
> --- a/arch/arm/mach-at91/arm926ejs/clock.c
> +++ b/arch/arm/mach-at91/arm926ejs/clock.c
> @@ -162,7 +162,13 @@ int at91_clock_init(unsigned long main_clock)
>  	gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
>  	freq = gd->arch.mck_rate_hz;
>  
> +#if defined(CONFIG_AT91SAM9X5)
> +	/* different in prescale on at91sam9x5 */
> +	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 4));

This one is really ugly ... I can live with the ifdef here but have you
realized the 0x7 for PRES?

Andreas

> +#else
>  	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2));	/* prescale */
> +#endif
> +
>  #if defined(CONFIG_AT91SAM9G20)
>  	/* mdiv ; (x >> 7) = ((x >> 8) * 2) */
>  	gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?
>
Andreas Bießmann Oct. 28, 2016, 9:47 a.m. UTC | #3
On Wed, Aug 17, 2016 at 09:13:24AM +0200, Heiko Schocher wrote:
> on at91sam9x5 PRES offset is 4 in the PMC master
> clock register.
> 
> Signed-off-by: Heiko Schocher <hs@denx.de>
> Acked-by: Wenyou Yang <wenyou.yang@atmel.com>

Acked-by: Andreas Bießmann <andreas@biessmann.org>

> ---
> 
>  arch/arm/mach-at91/arm926ejs/clock.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c
> index c8d24ae..e3181fa 100644
> --- a/arch/arm/mach-at91/arm926ejs/clock.c
> +++ b/arch/arm/mach-at91/arm926ejs/clock.c
> @@ -162,7 +162,13 @@ int at91_clock_init(unsigned long main_clock)
>  	gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
>  	freq = gd->arch.mck_rate_hz;
>  
> +#if defined(CONFIG_AT91SAM9X5)
> +	/* different in prescale on at91sam9x5 */
> +	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 4));
> +#else
>  	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2));	/* prescale */
> +#endif
> +
>  #if defined(CONFIG_AT91SAM9G20)
>  	/* mdiv ; (x >> 7) = ((x >> 8) * 2) */
>  	gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?
Andreas Bießmann Oct. 28, 2016, 4:49 p.m. UTC | #4
Dear Heiko Schocher,

Heiko Schocher <hs@denx.de> writes:
>on at91sam9x5 PRES offset is 4 in the PMC master
>clock register.
>
>Signed-off-by: Heiko Schocher <hs@denx.de>
>Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
>Acked-by: Andreas Bießmann <andreas@biessmann.org>
>---
>
> arch/arm/mach-at91/arm926ejs/clock.c | 6 ++++++
> 1 file changed, 6 insertions(+)

applied to u-boot-atmel/master, thanks!

Best regards,
Andreas Bießmann
diff mbox

Patch

diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach-at91/arm926ejs/clock.c
index c8d24ae..e3181fa 100644
--- a/arch/arm/mach-at91/arm926ejs/clock.c
+++ b/arch/arm/mach-at91/arm926ejs/clock.c
@@ -162,7 +162,13 @@  int at91_clock_init(unsigned long main_clock)
 	gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
 	freq = gd->arch.mck_rate_hz;
 
+#if defined(CONFIG_AT91SAM9X5)
+	/* different in prescale on at91sam9x5 */
+	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 4));
+#else
 	freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2));	/* prescale */
+#endif
+
 #if defined(CONFIG_AT91SAM9G20)
 	/* mdiv ; (x >> 7) = ((x >> 8) * 2) */
 	gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?