diff mbox

[U-Boot,7/7] ARM: tegra: enable PCIe controller on p2771-0000

Message ID 20160729191506.24803-7-swarren@wwwdotorg.org
State Accepted
Commit a6bb0084c2797b1e16403e2e812737ca1fb37669
Delegated to: Tom Warren
Headers show

Commit Message

Stephen Warren July 29, 2016, 7:15 p.m. UTC 
From: Stephen Warren <swarren@nvidia.com>

p2771-0000 has a couple of PCIe ports; one physically x4 desktop PCI
connector (which may run at x2 electrically, depending on the board
version and configuration) and a x1 connection to the M.2 slot (which may
not be active, depending on the board version and configuration). This
change enables those.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/dts/tegra186-p2771-0000-a02.dts | 19 +++++++++++++++++++
 arch/arm/dts/tegra186-p2771-0000-b00.dts | 19 +++++++++++++++++++
 board/nvidia/p2771-0000/p2771-0000.c     | 22 ++++++++++++++++++++++
 configs/p2771-0000-a02_defconfig         |  5 +++++
 configs/p2771-0000-b00_defconfig         |  5 +++++
 include/configs/p2771-0000.h             |  5 +++++
 6 files changed, 75 insertions(+)

Comments

Simon Glass Aug. 1, 2016, 1:04 a.m. UTC | #1 
Hi Stephen,

On 29 July 2016 at 13:15, Stephen Warren <swarren@wwwdotorg.org> wrote:
> From: Stephen Warren <swarren@nvidia.com>
>
> p2771-0000 has a couple of PCIe ports; one physically x4 desktop PCI
> connector (which may run at x2 electrically, depending on the board
> version and configuration) and a x1 connection to the M.2 slot (which may
> not be active, depending on the board version and configuration). This
> change enables those.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
>  arch/arm/dts/tegra186-p2771-0000-a02.dts | 19 +++++++++++++++++++
>  arch/arm/dts/tegra186-p2771-0000-b00.dts | 19 +++++++++++++++++++
>  board/nvidia/p2771-0000/p2771-0000.c     | 22 ++++++++++++++++++++++
>  configs/p2771-0000-a02_defconfig         |  5 +++++
>  configs/p2771-0000-b00_defconfig         |  5 +++++
>  include/configs/p2771-0000.h             |  5 +++++
>  6 files changed, 75 insertions(+)
>
> diff --git a/arch/arm/dts/tegra186-p2771-0000-a02.dts b/arch/arm/dts/tegra186-p2771-0000-a02.dts
> index 5ed3817a41c6..36a3c21a55de 100644
> --- a/arch/arm/dts/tegra186-p2771-0000-a02.dts
> +++ b/arch/arm/dts/tegra186-p2771-0000-a02.dts
> @@ -10,4 +10,23 @@
>                 cd-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_LOW>;
>                 power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>;
>         };
> +
> +       pcie-controller@10003000 {
> +               status = "okay";
> +
> +               pci@1,0 {
> +                       status = "okay";
> +                       nvidia,num-lanes = <2>;
> +               };
> +
> +               pci@2,0 {
> +                       status = "disabled";
> +                       nvidia,num-lanes = <1>;
> +               };
> +
> +               pci@3,0 {
> +                       status = "okay";
> +                       nvidia,num-lanes = <1>;
> +               };
> +       };
>  };
> diff --git a/arch/arm/dts/tegra186-p2771-0000-b00.dts b/arch/arm/dts/tegra186-p2771-0000-b00.dts
> index 90c99c33ccc6..0f1d0e83e80d 100644
> --- a/arch/arm/dts/tegra186-p2771-0000-b00.dts
> +++ b/arch/arm/dts/tegra186-p2771-0000-b00.dts
> @@ -10,4 +10,23 @@
>                 cd-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
>                 power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
>         };
> +
> +       pcie-controller@10003000 {
> +               status = "okay";
> +
> +               pci@1,0 {
> +                       status = "okay";
> +                       nvidia,num-lanes = <4>;
> +               };
> +
> +               pci@2,0 {
> +                       status = "disabled";
> +                       nvidia,num-lanes = <0>;
> +               };
> +
> +               pci@3,0 {
> +                       status = "disabled";
> +                       nvidia,num-lanes = <1>;
> +               };
> +       };
>  };
> diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c
> index 0c828a200542..529ed9d4547a 100644
> --- a/board/nvidia/p2771-0000/p2771-0000.c
> +++ b/board/nvidia/p2771-0000/p2771-0000.c
> @@ -31,3 +31,25 @@ int tegra_board_init(void)
>
>         return 0;
>  }
> +
> +int tegra_pcie_board_init(void)
> +{
> +       struct udevice *dev;
> +       uchar val;
> +       int ret;
> +
> +       /* Turn on MAX77620 LDO7 to 1.05V for PEX power */
> +       debug("%s: Set LDO7 for PEX power to 1.05V\n", __func__);
> +       ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
> +       if (ret) {
> +               printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
> +               return -1;
> +       }
> +       /* 0xC5 for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
> +       val = 0xC5;
> +       ret = dm_i2c_write(dev, MAX77620_CNFG1_L7_REG, &val, 1);
> +       if (ret)
> +               printf("i2c_write 0 0x3c 0x31 failed: %d\n", ret);

This looks like it should be a pmic regulator driver.

> +
> +       return 0;
> +}
> diff --git a/configs/p2771-0000-a02_defconfig b/configs/p2771-0000-a02_defconfig
> index 404f7acf7ef5..5ce369c6d330 100644
> --- a/configs/p2771-0000-a02_defconfig
> +++ b/configs/p2771-0000-a02_defconfig
> @@ -26,7 +26,12 @@ CONFIG_CMD_EXT4=y
>  CONFIG_CMD_EXT4_WRITE=y
>  CONFIG_CMD_FAT=y
>  CONFIG_CMD_FS_GENERIC=y
> +CONFIG_RTL8169=y
> +CONFIG_E1000=y
> +CONFIG_PCI_TEGRA=y
>  CONFIG_TEGRA186_BPMP_I2C=y
>  CONFIG_SYS_NS16550=y
>  CONFIG_USB=y
>  CONFIG_DM_USB=y
> +CONFIG_POWER_DOMAIN=y
> +CONFIG_TEGRA186_POWER_DOMAIN=y
> diff --git a/configs/p2771-0000-b00_defconfig b/configs/p2771-0000-b00_defconfig
> index ad35c99bbbcc..27393f3a5d46 100644
> --- a/configs/p2771-0000-b00_defconfig
> +++ b/configs/p2771-0000-b00_defconfig
> @@ -26,7 +26,12 @@ CONFIG_CMD_EXT4=y
>  CONFIG_CMD_EXT4_WRITE=y
>  CONFIG_CMD_FAT=y
>  CONFIG_CMD_FS_GENERIC=y
> +CONFIG_RTL8169=y
> +CONFIG_E1000=y
> +CONFIG_PCI_TEGRA=y
>  CONFIG_TEGRA186_BPMP_I2C=y
>  CONFIG_SYS_NS16550=y
>  CONFIG_USB=y
>  CONFIG_DM_USB=y
> +CONFIG_POWER_DOMAIN=y
> +CONFIG_TEGRA186_POWER_DOMAIN=y
> diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h
> index 3ce72086ce9c..1f64405f119a 100644
> --- a/include/configs/p2771-0000.h
> +++ b/include/configs/p2771-0000.h
> @@ -28,6 +28,11 @@
>  #define CONFIG_SYS_MMC_ENV_PART                2
>  #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
>
> +/* PCI host support */
> +#define CONFIG_PCI
> +#define CONFIG_PCI_PNP
> +#define CONFIG_CMD_PCI
> +
>  #include "tegra-common-post.h"
>
>  /* Crystal is 38.4MHz. clk_m runs at half that rate */
> --
> 2.9.2
>

Regards,
Simon
diff mbox

Patch

diff --git a/arch/arm/dts/tegra186-p2771-0000-a02.dts b/arch/arm/dts/tegra186-p2771-0000-a02.dts
index 5ed3817a41c6..36a3c21a55de 100644
--- a/arch/arm/dts/tegra186-p2771-0000-a02.dts
+++ b/arch/arm/dts/tegra186-p2771-0000-a02.dts
@@ -10,4 +10,23 @@ 
 		cd-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_LOW>;
 		power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_HIGH>;
 	};
+
+	pcie-controller@10003000 {
+		status = "okay";
+
+		pci@1,0 {
+			status = "okay";
+			nvidia,num-lanes = <2>;
+		};
+
+		pci@2,0 {
+			status = "disabled";
+			nvidia,num-lanes = <1>;
+		};
+
+		pci@3,0 {
+			status = "okay";
+			nvidia,num-lanes = <1>;
+		};
+	};
 };
diff --git a/arch/arm/dts/tegra186-p2771-0000-b00.dts b/arch/arm/dts/tegra186-p2771-0000-b00.dts
index 90c99c33ccc6..0f1d0e83e80d 100644
--- a/arch/arm/dts/tegra186-p2771-0000-b00.dts
+++ b/arch/arm/dts/tegra186-p2771-0000-b00.dts
@@ -10,4 +10,23 @@ 
 		cd-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
 		power-gpios = <&gpio_main TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
 	};
+
+	pcie-controller@10003000 {
+		status = "okay";
+
+		pci@1,0 {
+			status = "okay";
+			nvidia,num-lanes = <4>;
+		};
+
+		pci@2,0 {
+			status = "disabled";
+			nvidia,num-lanes = <0>;
+		};
+
+		pci@3,0 {
+			status = "disabled";
+			nvidia,num-lanes = <1>;
+		};
+	};
 };
diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c
index 0c828a200542..529ed9d4547a 100644
--- a/board/nvidia/p2771-0000/p2771-0000.c
+++ b/board/nvidia/p2771-0000/p2771-0000.c
@@ -31,3 +31,25 @@  int tegra_board_init(void)
 
 	return 0;
 }
+
+int tegra_pcie_board_init(void)
+{
+	struct udevice *dev;
+	uchar val;
+	int ret;
+
+	/* Turn on MAX77620 LDO7 to 1.05V for PEX power */
+	debug("%s: Set LDO7 for PEX power to 1.05V\n", __func__);
+	ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
+		return -1;
+	}
+	/* 0xC5 for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
+	val = 0xC5;
+	ret = dm_i2c_write(dev, MAX77620_CNFG1_L7_REG, &val, 1);
+	if (ret)
+		printf("i2c_write 0 0x3c 0x31 failed: %d\n", ret);
+
+	return 0;
+}
diff --git a/configs/p2771-0000-a02_defconfig b/configs/p2771-0000-a02_defconfig
index 404f7acf7ef5..5ce369c6d330 100644
--- a/configs/p2771-0000-a02_defconfig
+++ b/configs/p2771-0000-a02_defconfig
@@ -26,7 +26,12 @@  CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_RTL8169=y
+CONFIG_E1000=y
+CONFIG_PCI_TEGRA=y
 CONFIG_TEGRA186_BPMP_I2C=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TEGRA186_POWER_DOMAIN=y
diff --git a/configs/p2771-0000-b00_defconfig b/configs/p2771-0000-b00_defconfig
index ad35c99bbbcc..27393f3a5d46 100644
--- a/configs/p2771-0000-b00_defconfig
+++ b/configs/p2771-0000-b00_defconfig
@@ -26,7 +26,12 @@  CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
+CONFIG_RTL8169=y
+CONFIG_E1000=y
+CONFIG_PCI_TEGRA=y
 CONFIG_TEGRA186_BPMP_I2C=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TEGRA186_POWER_DOMAIN=y
diff --git a/include/configs/p2771-0000.h b/include/configs/p2771-0000.h
index 3ce72086ce9c..1f64405f119a 100644
--- a/include/configs/p2771-0000.h
+++ b/include/configs/p2771-0000.h
@@ -28,6 +28,11 @@ 
 #define CONFIG_SYS_MMC_ENV_PART		2
 #define CONFIG_ENV_OFFSET		(-CONFIG_ENV_SIZE)
 
+/* PCI host support */
+#define CONFIG_PCI
+#define CONFIG_PCI_PNP
+#define CONFIG_CMD_PCI
+
 #include "tegra-common-post.h"
 
 /* Crystal is 38.4MHz. clk_m runs at half that rate */