Message ID | 1469683584-21695-1-git-send-email-jh80.chung@samsung.com |
---|---|
State | Accepted |
Commit | 4587f53a582c9ab0bd908cff590755bfc03fced4 |
Delegated to: | Jaehoon Chung |
Headers | show |
Hi Jaehoon, On 2016年07月28日 13:26, Jaehoon Chung wrote: > According to DesignWare TRM, FIFO_COUNT is bit[29:17]. > If get the correct fifo_count value, it has to use the FIFO_MASK > as 0x1FFF, not 0x1FF. Ah, I have no doubt the fifo_count defined. The fifo depth of Rockchip SoCs is 256, the former work sane coincidentally.:-) Thanks for fix. Reviewed-by: Ziyuan Xu <xzy.xu@rock-chips.com> > > Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> > --- > include/dwmmc.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/dwmmc.h b/include/dwmmc.h > index 6aebe96..eb03f7f 100644 > --- a/include/dwmmc.h > +++ b/include/dwmmc.h > @@ -105,7 +105,7 @@ > > /* Status Register */ > #define DWMCI_BUSY (1 << 9) > -#define DWMCI_FIFO_MASK 0x1ff > +#define DWMCI_FIFO_MASK 0x1fff > #define DWMCI_FIFO_SHIFT 17 > > /* FIFOTH Register */
On 07/28/2016 02:26 PM, Jaehoon Chung wrote: > According to DesignWare TRM, FIFO_COUNT is bit[29:17]. > If get the correct fifo_count value, it has to use the FIFO_MASK > as 0x1FFF, not 0x1FF. > > Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> > Reviewed-by: Ziyuan Xu <xzy.xu@rock-chips.com> Applied on u-boot-mmc. Thanks! Best Regards, Jaehoon Chung > --- > include/dwmmc.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/dwmmc.h b/include/dwmmc.h > index 6aebe96..eb03f7f 100644 > --- a/include/dwmmc.h > +++ b/include/dwmmc.h > @@ -105,7 +105,7 @@ > > /* Status Register */ > #define DWMCI_BUSY (1 << 9) > -#define DWMCI_FIFO_MASK 0x1ff > +#define DWMCI_FIFO_MASK 0x1fff > #define DWMCI_FIFO_SHIFT 17 > > /* FIFOTH Register */ >
diff --git a/include/dwmmc.h b/include/dwmmc.h index 6aebe96..eb03f7f 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -105,7 +105,7 @@ /* Status Register */ #define DWMCI_BUSY (1 << 9) -#define DWMCI_FIFO_MASK 0x1ff +#define DWMCI_FIFO_MASK 0x1fff #define DWMCI_FIFO_SHIFT 17 /* FIFOTH Register */
According to DesignWare TRM, FIFO_COUNT is bit[29:17]. If get the correct fifo_count value, it has to use the FIFO_MASK as 0x1FFF, not 0x1FF. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> --- include/dwmmc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)