Patchwork ARM: More reorganization of extend patterns (PR43137)

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Submitter Bernd Schmidt
Date Sept. 21, 2010, 1:15 p.m.
Message ID <4C98AFDC.70805@codesourcery.com>
Download mbox | patch
Permalink /patch/65306/
State New
Headers show

Comments

Bernd Schmidt - Sept. 21, 2010, 1:15 p.m.
On 09/16/2010 12:04 PM, Richard Earnshaw wrote:
> So as Uros points out, the constraints also need a macro substitution
> (or you'll end up with a potentially invalid insn during reload).
>
> Otherwise, OK.

Here's the patch I committed.


Bernd

Patch

Index: config/arm/iterators.md
===================================================================
--- config/arm/iterators.md	(revision 164476)
+++ config/arm/iterators.md	(working copy)
@@ -381,6 +381,10 @@  (define_mode_attr V_unpack   [(V16QI "V8
 (define_mode_attr qhs_zextenddi_cond [(SI "") (HI "&& arm_arch6") (QI "")])
 (define_mode_attr qhs_sextenddi_cond [(SI "") (HI "&& arm_arch6")
 				      (QI "&& arm_arch6")])
+(define_mode_attr qhs_extenddi_op [(SI "s_register_operand")
+				   (HI "nonimmediate_operand")
+				   (QI "nonimmediate_operand")])
+(define_mode_attr qhs_extenddi_cstr [(SI "r") (HI "rm") (QI "rm")])
 
 ;;----------------------------------------------------------------------------
 ;; Code attributes
Index: config/arm/arm.md
===================================================================
--- config/arm/arm.md	(revision 164476)
+++ config/arm/arm.md	(working copy)
@@ -4042,7 +4042,8 @@  (define_expand "truncdfhf2"
 
 (define_insn "zero_extend<mode>di2"
   [(set (match_operand:DI 0 "s_register_operand" "=r")
-        (zero_extend:DI (match_operand:QHSI 1 "nonimmediate_operand" "rm")))]
+        (zero_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>"
+					    "<qhs_extenddi_cstr>")))]
   "TARGET_32BIT <qhs_zextenddi_cond>"
   "#"
   [(set_attr "length" "8")
@@ -4052,7 +4053,8 @@  (define_insn "zero_extend<mode>di2"
 
 (define_insn "extend<mode>di2"
   [(set (match_operand:DI 0 "s_register_operand" "=r")
-        (sign_extend:DI (match_operand:QHSI 1 "nonimmediate_operand" "rm")))]
+        (sign_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>"
+					    "<qhs_extenddi_cstr>")))]
   "TARGET_32BIT <qhs_sextenddi_cond>"
   "#"
   [(set_attr "length" "8")