From patchwork Tue Jul 26 14:37:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 652797 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rzLbn15NJz9t1g for ; Wed, 27 Jul 2016 00:48:53 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=XUDqz7cx; dkim-atps=neutral Received: from localhost ([::1]:40350 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS3f9-00079j-69 for incoming@patchwork.ozlabs.org; Tue, 26 Jul 2016 10:48:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36421) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS3Uj-0006GK-0l for qemu-devel@nongnu.org; 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@@ -36,6 +37,15 @@ struct IRQState { int n; }; +struct OrIRQState { + Object parent_obj; + + qemu_irq in_irq; + qemu_irq *out_irqs; + int *levels; + int n; +}; + void qemu_set_irq(qemu_irq irq, int level) { if (!irq) @@ -77,6 +87,33 @@ qemu_irq qemu_allocate_irq(qemu_irq_handler handler, void *opaque, int n) return irq; } +static void or_irq_handler(void *opaque, int n, int level) +{ + qemu_or_irq or_irq = (qemu_or_irq) opaque; + int or_level = 0; + int i; + + or_irq->levels[n] = level; + + for (i = 0; i < or_irq->n; i++) { + or_level |= or_irq->levels[i]; + } + + qemu_set_irq(or_irq->in_irq, or_level); +} + +qemu_irq *qemu_allocate_or_irqs(qemu_irq in_irq, int n) +{ + qemu_or_irq or_irq = OR_IRQ(object_new(TYPE_OR_IRQ)); + + or_irq->out_irqs = qemu_allocate_irqs(or_irq_handler, or_irq, n); + or_irq->in_irq = in_irq; + or_irq->levels = g_new(int, n); + or_irq->n = n; + + return or_irq->out_irqs; +} + void qemu_free_irqs(qemu_irq *s, int n) { int i; @@ -151,9 +188,16 @@ static const TypeInfo irq_type_info = { .instance_size = sizeof(struct IRQState), }; +static const TypeInfo or_irq_type_info = { + .name = TYPE_OR_IRQ, + .parent = TYPE_OBJECT, + .instance_size = sizeof(struct OrIRQState), +}; + static void irq_register_types(void) { type_register_static(&irq_type_info); + type_register_static(&or_irq_type_info); } type_init(irq_register_types) diff --git a/include/hw/irq.h b/include/hw/irq.h index 4c4c2ea..aeb7eb7 100644 --- a/include/hw/irq.h +++ b/include/hw/irq.h @@ -4,8 +4,10 @@ /* Generic IRQ/GPIO pin infrastructure. */ #define TYPE_IRQ "irq" +#define TYPE_OR_IRQ "or-irq" typedef struct IRQState *qemu_irq; +typedef struct OrIRQState *qemu_or_irq; typedef void (*qemu_irq_handler)(void *opaque, int n, int level); @@ -38,6 +40,17 @@ qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n); */ qemu_irq qemu_allocate_irq(qemu_irq_handler handler, void *opaque, int n); +/* + * qemu_allocate_or_irqs + * @in_irq: An input IRQ. It will be the result of the @out_irqs ORed together + * @n: The number of interrupt lines that should be ORed together + * + * returns: An array of interrupts that should be ORed together + * + * OR all of the interrupts returned in the array into a single @in_irq. + */ +qemu_irq *qemu_allocate_or_irqs(qemu_irq in_irq, int n); + /* Extends an Array of IRQs. Old IRQs have their handlers and opaque data * preserved. New IRQs are assigned the argument handler and opaque data. */