From patchwork Tue Jul 26 14:37:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 652788 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rzLSF6G2Hz9t0H for ; Wed, 27 Jul 2016 00:42:21 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=UDdwmpWV; dkim-atps=neutral Received: from localhost ([::1]:40300 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS3Yp-0001Wt-RD for incoming@patchwork.ozlabs.org; Tue, 26 Jul 2016 10:42:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36261) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS3US-000652-JZ for qemu-devel@nongnu.org; Tue, 26 Jul 2016 10:37:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bS3UR-0000C2-Bu for qemu-devel@nongnu.org; Tue, 26 Jul 2016 10:37:48 -0400 Received: from mail-pa0-x244.google.com ([2607:f8b0:400e:c03::244]:33887) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bS3UR-0000Bk-4m for qemu-devel@nongnu.org; Tue, 26 Jul 2016 10:37:47 -0400 Received: by mail-pa0-x244.google.com with SMTP id hh10so87987pac.1 for ; Tue, 26 Jul 2016 07:37:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sNX+3qqO5DB+d/hnJMV+9UKQAGcCNf1Ca2MPT//9ukA=; b=UDdwmpWVNlpd1y9TEPrBj+bv9nRSxnR1iOweFj8RnzzDVcrN/9+fts7wFZAH3pT5ub YwYvqFCMsbG5d/0JEy16EieWwY+KOA6uAEPpYBhMfP5c9QlPutrwRB7zKBA5ZbFPqz+E 616BrYgCD9z8RsR8zfGwneaH414RC4VzkIwGKfLKOVpKSIO8Y+ZEEkN9IvMxu6+5BIOb 0TEdQWMK7s3WxCsD780VMUsd6Z4X6q/IbppykyHLg4J1lOzqBJI/OPcHokk6XsRq4X5B Qp0rFb4unJC3xyOAmVEVls0nfIiK5FLQi7nbzhkiLxAQzyPs7mL+owNO99AnmsFCRrHF Tp2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sNX+3qqO5DB+d/hnJMV+9UKQAGcCNf1Ca2MPT//9ukA=; b=LGplv+7+zIJjGYt/lWA/+3pvwm9sLDR1XU6+mk9IJF7HX6KOM6Uk2NMmzxpexu5KGw T55JS9xRJyHihgOPmYk5ZffJHJ94POfqjViRkNuGTFk6fqrsBjIM74MQowKYPnaEpsKe CBCYs5AK2lKSD+XrwmOdGqW6bI9MgaLBNBzhSR/oOnyQYXQcOa9FAJIcnZg0EA/3TcVF 3ucHhBn04XcFzwj3SNVjU+Kdk6zo23D+Ewvt/0BFC++V/ik0Ir3t7+A7QNKPS0RjGws0 msW4Ox/mH74dtK1jfycDCugbpeSFNnjGunGeBd1imIPlRz52P0B8oH7vgeO6tcs+AfLx s/3A== X-Gm-Message-State: AEkoouvpSVJQOb8EFvE+8U3lgx3NogaW94/k7Sc0MM3kfHYCEX4iDKbHjTpzASK/BTgt9Q== X-Received: by 10.67.13.196 with SMTP id fa4mr40725300pad.115.1469543866434; Tue, 26 Jul 2016 07:37:46 -0700 (PDT) Received: from localhost ([2601:646:8581:937e:b117:7414:118e:4042]) by smtp.gmail.com with ESMTPSA id m5sm2009840paw.40.2016.07.26.07.37.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Jul 2016 07:37:45 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Tue, 26 Jul 2016 07:37:45 -0700 Message-Id: <897bcab4156ace031f16aa0d16cc02589ddbcd28.1469514677.git.alistair@alistair23.me> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c03::244 Subject: [Qemu-devel] [PATCH v5 2/8] STM32F2xx: Display PWM duty cycle from timer X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, peter.crosthwaite@xilinx.com, konstanty@ieee.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" If correctly configured allow the STM32F2xx timer to print out the PWM duty cycle information. Signed-off-by: Alistair Francis Reviewed-by: Peter Crosthwaite --- V3: - Use OR instead of + for masking - Improve clarity of print statement V2: - Fix up if statement braces - Remove stm32f2xx_timer_set_alarm() call hw/timer/stm32f2xx_timer.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c index bf0fb28..8c4c1f9 100644 --- a/hw/timer/stm32f2xx_timer.c +++ b/hw/timer/stm32f2xx_timer.c @@ -51,6 +51,15 @@ static void stm32f2xx_timer_interrupt(void *opaque) qemu_irq_pulse(s->irq); stm32f2xx_timer_set_alarm(s, s->hit_time); } + + if (s->tim_ccmr1 & (TIM_CCMR1_OC2M2 | TIM_CCMR1_OC2M1) && + !(s->tim_ccmr1 & TIM_CCMR1_OC2M0) && + s->tim_ccmr1 & TIM_CCMR1_OC2PE && + s->tim_ccer & TIM_CCER_CC2E) { + /* PWM 2 - Mode 1 */ + DB_PRINT("PWM2 Duty Cycle: %d%%\n", + s->tim_ccr2 / (100 * (s->tim_psc + 1))); + } } static inline int64_t stm32f2xx_ns_to_ticks(STM32F2XXTimerState *s, int64_t t)