From patchwork Sat Sep 11 01:08:33 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 64480 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1BDE7B70AA for ; Sat, 11 Sep 2010 11:09:47 +1000 (EST) Received: from localhost ([127.0.0.1]:60893 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OuEb9-0003cY-0W for incoming@patchwork.ozlabs.org; Fri, 10 Sep 2010 21:09:43 -0400 Received: from [140.186.70.92] (port=60287 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OuEa6-0003cI-6z for qemu-devel@nongnu.org; Fri, 10 Sep 2010 21:08:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OuEa4-0003Fm-TQ for qemu-devel@nongnu.org; Fri, 10 Sep 2010 21:08:38 -0400 Received: from cantor2.suse.de ([195.135.220.15]:39484 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OuEa4-0003FR-Nk for qemu-devel@nongnu.org; Fri, 10 Sep 2010 21:08:36 -0400 Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.221.2]) by mx2.suse.de (Postfix) with ESMTP id EFE8F8AC33; Sat, 11 Sep 2010 03:08:34 +0200 (CEST) From: Alexander Graf To: QEMU Developers Date: Sat, 11 Sep 2010 03:08:33 +0200 Message-Id: <1284167314-11594-2-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1284167314-11594-1-git-send-email-agraf@suse.de> References: <1284167314-11594-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4-2.6 Cc: Thomas Monjalon , "Edgar E. Iglesias" Subject: [Qemu-devel] [PATCH 1/2] PPC: Enable hint bits for lwarx/ldarx X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The lwarx and ldarx instructions have a bit to give some hint to the CPU which is safe to ignore. We currently refuse to accept any instruction with that bit set, as it used to be declared MBZ. Let's remove the reserved bit and make the instruction work as expected. This fixes Linux boot for ppc64. Signed-off-by: Alexander Graf Reviewed-by: Andreas Färber --- target-ppc/translate.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 95ab0a1..fd06861 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -8048,10 +8048,10 @@ GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_STRING), GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_STRING), GEN_HANDLER(eieio, 0x1F, 0x16, 0x1A, 0x03FFF801, PPC_MEM_EIEIO), GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FFF801, PPC_MEM), -GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES), +GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000000, PPC_RES), GEN_HANDLER2(stwcx_, "stwcx.", 0x1F, 0x16, 0x04, 0x00000000, PPC_RES), #if defined(TARGET_PPC64) -GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000001, PPC_64B), +GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000000, PPC_64B), GEN_HANDLER2(stdcx_, "stdcx.", 0x1F, 0x16, 0x06, 0x00000000, PPC_64B), #endif GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x039FF801, PPC_MEM_SYNC),