[v9,1/4] dt-bindings: soc: Add documentation for the MediaTek GCE unit
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Message ID 1467270883-1407-2-git-send-email-hs.liao@mediatek.com
State Not Applicable, archived
Headers show

Commit Message

hs.liao@mediatek.com June 30, 2016, 7:14 a.m. UTC
This adds documentation for the MediaTek Global Command Engine (GCE) unit
found in MT8173 SoCs.

Signed-off-by: HS Liao <hs.liao@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/soc/mediatek/gce.txt       | 44 ++++++++++++++++++++++
 1 file changed, 44 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/mediatek/gce.txt

Comments

Jan Lübbe July 8, 2016, 10:17 a.m. UTC | #1
On Do, 2016-06-30 at 15:14 +0800, HS Liao wrote:
[...]
> +Required properties:
> +- compatible: Must be "mediatek,mt8173-gce"
> +- reg: Address range of the GCE unit
> +- interrupts: The interrupt signal from the GCE block
> +- clock: Clocks according to the common clock binding
> +- clock-names: Must be "gce" to stand for GCE clock
> +- #mbox-cells: Should be 1
[...]
> +		#mbox-cells = <1>;
[...]
> +		mediatek,gce = <&gce>;
> +		mboxes = <&gce 0 1 /* main display with merging wfe */
> +			  &gce 1 1>; /* sub display with merging wfe */

It seems that you use two cells instead of one as you declared above.
This should be consistent.

Also, why do you need an explicit phandle to the gce if you already use
mailboxes?

Best regards,
Jan Lübbe
hs.liao@mediatek.com July 11, 2016, 2:55 a.m. UTC | #2
Hi Jan,

On Fri, 2016-07-08 at 12:17 +0200, Jan Lübbe wrote:
> On Do, 2016-06-30 at 15:14 +0800, HS Liao wrote:
> [...]
> > +Required properties:
> > +- compatible: Must be "mediatek,mt8173-gce"
> > +- reg: Address range of the GCE unit
> > +- interrupts: The interrupt signal from the GCE block
> > +- clock: Clocks according to the common clock binding
> > +- clock-names: Must be "gce" to stand for GCE clock
> > +- #mbox-cells: Should be 1
> [...]
> > +		#mbox-cells = <1>;
> [...]
> > +		mediatek,gce = <&gce>;
> > +		mboxes = <&gce 0 1 /* main display with merging wfe */
> > +			  &gce 1 1>; /* sub display with merging wfe */
> 
> It seems that you use two cells instead of one as you declared above.
> This should be consistent.

Will correct it as 2.

> Also, why do you need an explicit phandle to the gce if you already use
> mailboxes?

"mediatek,gce" should be added to all clients which ask gce to access 
their registers.

"mboxes" should be added to all clients which will communicate with gce
via mailbox.

For example, if mmsys send cmdq tasks to ask gce to write registers of 
mmsys and ovl, mmsys should have "mediatek,gce" and "mboxes", and ovl
should have "mediatek,gce".

I will explain their difference in GCE's device tree document.

> Best regards,
> Jan Lübbe

Thanks,
HS

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Patch
diff mbox

diff --git a/Documentation/devicetree/bindings/soc/mediatek/gce.txt b/Documentation/devicetree/bindings/soc/mediatek/gce.txt
new file mode 100644
index 0000000..63c5364
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/gce.txt
@@ -0,0 +1,44 @@ 
+MediaTek GCE
+===============
+
+The Global Command Engine (GCE) is used to help read/write registers with
+critical time limitation, such as updating display configuration during the
+vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
+
+CMDQ driver uses mailbox framework for communication. Please refer to
+../../mailbox/mailbox.txt for generic information about mailbox device-tree
+bindings.
+
+Required properties:
+- compatible: Must be "mediatek,mt8173-gce"
+- reg: Address range of the GCE unit
+- interrupts: The interrupt signal from the GCE block
+- clock: Clocks according to the common clock binding
+- clock-names: Must be "gce" to stand for GCE clock
+- #mbox-cells: Should be 1
+
+Required properties for a client device:
+- mediatek,gce: Should point to the respective GCE block
+- mboxes: List of phandle, mailbox channel specifiers, and merging wfe flag.
+
+Example:
+
+	gce: gce@10212000 {
+		compatible = "mediatek,mt8173-gce";
+		reg = <0 0x10212000 0 0x1000>;
+		interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&infracfg CLK_INFRA_GCE>;
+		clock-names = "gce";
+
+		#mbox-cells = <1>;
+	};
+
+Example for a client device:
+
+	mmsys: clock-controller@14000000 {
+		compatible = "mediatek,mt8173-mmsys";
+		mediatek,gce = <&gce>;
+		mboxes = <&gce 0 1 /* main display with merging wfe */
+			  &gce 1 1>; /* sub display with merging wfe */
+		...
+	};