Message ID | 1467107968-10410-2-git-send-email-marcel@redhat.com |
---|---|
State | New |
Headers | show |
On Tue, 28 Jun 2016 12:59:26 +0300 Marcel Apfelbaum <marcel@redhat.com> wrote: > Instead of always passing both IO and MEM ranges when > computing CRS ranges, define a new CrsRangeSet structure > that include them both. > > This is done before introducing a third type of range, > 64-bit MEM, so it will be easier to pass them all around. > > Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> > --- > hw/i386/acpi-build.c | 82 ++++++++++++++++++++++++++++++++-------------------- > 1 file changed, 51 insertions(+), 31 deletions(-) > > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c > index 5a594be..f306ae3 100644 > --- a/hw/i386/acpi-build.c > +++ b/hw/i386/acpi-build.c > @@ -743,6 +743,23 @@ static void crs_range_free(gpointer data) > g_free(entry); > } > > +typedef struct CrsRangeSet { > + GPtrArray *io_ranges; > + GPtrArray *mem_ranges; > + } CrsRangeSet; > + > +static void crs_range_set_init(CrsRangeSet *range_set) > +{ > + range_set->io_ranges = g_ptr_array_new_with_free_func(crs_range_free); > + range_set->mem_ranges = g_ptr_array_new_with_free_func(crs_range_free); > +} > + > +static void crs_range_set_free(CrsRangeSet *range_set) > +{ > + g_ptr_array_free(range_set->io_ranges, true); > + g_ptr_array_free(range_set->mem_ranges, true); > +} > + > static gint crs_range_compare(gconstpointer a, gconstpointer b) > { > CrsRangeEntry *entry_a = *(CrsRangeEntry **)a; > @@ -827,18 +844,17 @@ static void crs_range_merge(GPtrArray *range) > g_ptr_array_free(tmp, true); > } > > -static Aml *build_crs(PCIHostState *host, > - GPtrArray *io_ranges, GPtrArray *mem_ranges) > +static Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set) > { > Aml *crs = aml_resource_template(); > - GPtrArray *host_io_ranges = g_ptr_array_new_with_free_func(crs_range_free); > - GPtrArray *host_mem_ranges = g_ptr_array_new_with_free_func(crs_range_free); > + CrsRangeSet temp_range_set; > CrsRangeEntry *entry; > uint8_t max_bus = pci_bus_num(host->bus); > uint8_t type; > int devfn; > int i; > > + crs_range_set_init(&temp_range_set); > for (devfn = 0; devfn < ARRAY_SIZE(host->bus->devices); devfn++) { > uint64_t range_base, range_limit; > PCIDevice *dev = host->bus->devices[devfn]; > @@ -862,9 +878,11 @@ static Aml *build_crs(PCIHostState *host, > } > > if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { > - crs_range_insert(host_io_ranges, range_base, range_limit); > + crs_range_insert(temp_range_set.io_ranges, > + range_base, range_limit); > } else { /* "memory" */ > - crs_range_insert(host_mem_ranges, range_base, range_limit); > + crs_range_insert(temp_range_set.mem_ranges, > + range_base, range_limit); > } > } > > @@ -883,7 +901,8 @@ static Aml *build_crs(PCIHostState *host, > * that do not support multiple root buses > */ > if (range_base && range_base <= range_limit) { > - crs_range_insert(host_io_ranges, range_base, range_limit); > + crs_range_insert(temp_range_set.io_ranges, > + range_base, range_limit); > } > > range_base = > @@ -896,7 +915,8 @@ static Aml *build_crs(PCIHostState *host, > * that do not support multiple root buses > */ > if (range_base && range_base <= range_limit) { > - crs_range_insert(host_mem_ranges, range_base, range_limit); > + crs_range_insert(temp_range_set.mem_ranges, > + range_base, range_limit); > } > > range_base = > @@ -909,35 +929,36 @@ static Aml *build_crs(PCIHostState *host, > * that do not support multiple root buses > */ > if (range_base && range_base <= range_limit) { > - crs_range_insert(host_mem_ranges, range_base, range_limit); > + crs_range_insert(temp_range_set.mem_ranges, > + range_base, range_limit); > } > } > } > > - crs_range_merge(host_io_ranges); > - for (i = 0; i < host_io_ranges->len; i++) { > - entry = g_ptr_array_index(host_io_ranges, i); > + crs_range_merge(temp_range_set.io_ranges); > + for (i = 0; i < temp_range_set.io_ranges->len; i++) { > + entry = g_ptr_array_index(temp_range_set.io_ranges, i); > aml_append(crs, > aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED, > AML_POS_DECODE, AML_ENTIRE_RANGE, > 0, entry->base, entry->limit, 0, > entry->limit - entry->base + 1)); > - crs_range_insert(io_ranges, entry->base, entry->limit); > + crs_range_insert(range_set->io_ranges, entry->base, entry->limit); > } > - g_ptr_array_free(host_io_ranges, true); > > - crs_range_merge(host_mem_ranges); > - for (i = 0; i < host_mem_ranges->len; i++) { > - entry = g_ptr_array_index(host_mem_ranges, i); > + crs_range_merge(temp_range_set.mem_ranges); > + for (i = 0; i < temp_range_set.mem_ranges->len; i++) { > + entry = g_ptr_array_index(temp_range_set.mem_ranges, i); > aml_append(crs, > aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, > AML_MAX_FIXED, AML_NON_CACHEABLE, > AML_READ_WRITE, > 0, entry->base, entry->limit, 0, > entry->limit - entry->base + 1)); > - crs_range_insert(mem_ranges, entry->base, entry->limit); > + crs_range_insert(range_set->mem_ranges, entry->base, entry->limit); > } > - g_ptr_array_free(host_mem_ranges, true); > + > + crs_range_set_free(&temp_range_set); > > aml_append(crs, > aml_word_bus_number(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE, > @@ -1894,8 +1915,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, > { > CrsRangeEntry *entry; > Aml *dsdt, *sb_scope, *scope, *dev, *method, *field, *pkg, *crs; > - GPtrArray *mem_ranges = g_ptr_array_new_with_free_func(crs_range_free); > - GPtrArray *io_ranges = g_ptr_array_new_with_free_func(crs_range_free); > + CrsRangeSet crs_range_set; > PCMachineState *pcms = PC_MACHINE(machine); > PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(machine); > uint32_t nr_mem = machine->ram_slots; > @@ -1984,6 +2004,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, > } > aml_append(dsdt, scope); > > + crs_range_set_init(&crs_range_set); > bus = PC_MACHINE(machine)->bus; > if (bus) { > QLIST_FOREACH(bus, &bus->child, sibling) { > @@ -2010,8 +2031,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, > } > > aml_append(dev, build_prt(false)); > - crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), > - io_ranges, mem_ranges); > + crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set); > aml_append(dev, aml_name_decl("_CRS", crs)); > aml_append(scope, dev); > aml_append(dsdt, scope); > @@ -2032,9 +2052,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, > AML_POS_DECODE, AML_ENTIRE_RANGE, > 0x0000, 0x0000, 0x0CF7, 0x0000, 0x0CF8)); > > - crs_replace_with_free_ranges(io_ranges, 0x0D00, 0xFFFF); > - for (i = 0; i < io_ranges->len; i++) { > - entry = g_ptr_array_index(io_ranges, i); > + crs_replace_with_free_ranges(crs_range_set.io_ranges, 0x0D00, 0xFFFF); > + for (i = 0; i < crs_range_set.io_ranges->len; i++) { > + entry = g_ptr_array_index(crs_range_set.io_ranges, i); > aml_append(crs, > aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED, > AML_POS_DECODE, AML_ENTIRE_RANGE, > @@ -2047,9 +2067,10 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, > AML_CACHEABLE, AML_READ_WRITE, > 0, 0x000A0000, 0x000BFFFF, 0, 0x00020000)); > > - crs_replace_with_free_ranges(mem_ranges, pci->w32.begin, pci->w32.end - 1); > - for (i = 0; i < mem_ranges->len; i++) { > - entry = g_ptr_array_index(mem_ranges, i); > + crs_replace_with_free_ranges(crs_range_set.mem_ranges, > + pci->w32.begin, pci->w32.end - 1); > + for (i = 0; i < crs_range_set. mem_ranges->len; i++) { > + entry = g_ptr_array_index(crs_range_set.mem_ranges, i); > aml_append(crs, > aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED, > AML_NON_CACHEABLE, AML_READ_WRITE, > @@ -2084,8 +2105,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, > aml_append(dev, aml_name_decl("_CRS", crs)); > aml_append(scope, dev); > > - g_ptr_array_free(io_ranges, true); > - g_ptr_array_free(mem_ranges, true); > + crs_range_set_free(&crs_range_set); > > /* reserve PCIHP resources */ > if (pm->pcihp_io_len) {
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 5a594be..f306ae3 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -743,6 +743,23 @@ static void crs_range_free(gpointer data) g_free(entry); } +typedef struct CrsRangeSet { + GPtrArray *io_ranges; + GPtrArray *mem_ranges; + } CrsRangeSet; + +static void crs_range_set_init(CrsRangeSet *range_set) +{ + range_set->io_ranges = g_ptr_array_new_with_free_func(crs_range_free); + range_set->mem_ranges = g_ptr_array_new_with_free_func(crs_range_free); +} + +static void crs_range_set_free(CrsRangeSet *range_set) +{ + g_ptr_array_free(range_set->io_ranges, true); + g_ptr_array_free(range_set->mem_ranges, true); +} + static gint crs_range_compare(gconstpointer a, gconstpointer b) { CrsRangeEntry *entry_a = *(CrsRangeEntry **)a; @@ -827,18 +844,17 @@ static void crs_range_merge(GPtrArray *range) g_ptr_array_free(tmp, true); } -static Aml *build_crs(PCIHostState *host, - GPtrArray *io_ranges, GPtrArray *mem_ranges) +static Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set) { Aml *crs = aml_resource_template(); - GPtrArray *host_io_ranges = g_ptr_array_new_with_free_func(crs_range_free); - GPtrArray *host_mem_ranges = g_ptr_array_new_with_free_func(crs_range_free); + CrsRangeSet temp_range_set; CrsRangeEntry *entry; uint8_t max_bus = pci_bus_num(host->bus); uint8_t type; int devfn; int i; + crs_range_set_init(&temp_range_set); for (devfn = 0; devfn < ARRAY_SIZE(host->bus->devices); devfn++) { uint64_t range_base, range_limit; PCIDevice *dev = host->bus->devices[devfn]; @@ -862,9 +878,11 @@ static Aml *build_crs(PCIHostState *host, } if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { - crs_range_insert(host_io_ranges, range_base, range_limit); + crs_range_insert(temp_range_set.io_ranges, + range_base, range_limit); } else { /* "memory" */ - crs_range_insert(host_mem_ranges, range_base, range_limit); + crs_range_insert(temp_range_set.mem_ranges, + range_base, range_limit); } } @@ -883,7 +901,8 @@ static Aml *build_crs(PCIHostState *host, * that do not support multiple root buses */ if (range_base && range_base <= range_limit) { - crs_range_insert(host_io_ranges, range_base, range_limit); + crs_range_insert(temp_range_set.io_ranges, + range_base, range_limit); } range_base = @@ -896,7 +915,8 @@ static Aml *build_crs(PCIHostState *host, * that do not support multiple root buses */ if (range_base && range_base <= range_limit) { - crs_range_insert(host_mem_ranges, range_base, range_limit); + crs_range_insert(temp_range_set.mem_ranges, + range_base, range_limit); } range_base = @@ -909,35 +929,36 @@ static Aml *build_crs(PCIHostState *host, * that do not support multiple root buses */ if (range_base && range_base <= range_limit) { - crs_range_insert(host_mem_ranges, range_base, range_limit); + crs_range_insert(temp_range_set.mem_ranges, + range_base, range_limit); } } } - crs_range_merge(host_io_ranges); - for (i = 0; i < host_io_ranges->len; i++) { - entry = g_ptr_array_index(host_io_ranges, i); + crs_range_merge(temp_range_set.io_ranges); + for (i = 0; i < temp_range_set.io_ranges->len; i++) { + entry = g_ptr_array_index(temp_range_set.io_ranges, i); aml_append(crs, aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE, AML_ENTIRE_RANGE, 0, entry->base, entry->limit, 0, entry->limit - entry->base + 1)); - crs_range_insert(io_ranges, entry->base, entry->limit); + crs_range_insert(range_set->io_ranges, entry->base, entry->limit); } - g_ptr_array_free(host_io_ranges, true); - crs_range_merge(host_mem_ranges); - for (i = 0; i < host_mem_ranges->len; i++) { - entry = g_ptr_array_index(host_mem_ranges, i); + crs_range_merge(temp_range_set.mem_ranges); + for (i = 0; i < temp_range_set.mem_ranges->len; i++) { + entry = g_ptr_array_index(temp_range_set.mem_ranges, i); aml_append(crs, aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED, AML_NON_CACHEABLE, AML_READ_WRITE, 0, entry->base, entry->limit, 0, entry->limit - entry->base + 1)); - crs_range_insert(mem_ranges, entry->base, entry->limit); + crs_range_insert(range_set->mem_ranges, entry->base, entry->limit); } - g_ptr_array_free(host_mem_ranges, true); + + crs_range_set_free(&temp_range_set); aml_append(crs, aml_word_bus_number(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE, @@ -1894,8 +1915,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, { CrsRangeEntry *entry; Aml *dsdt, *sb_scope, *scope, *dev, *method, *field, *pkg, *crs; - GPtrArray *mem_ranges = g_ptr_array_new_with_free_func(crs_range_free); - GPtrArray *io_ranges = g_ptr_array_new_with_free_func(crs_range_free); + CrsRangeSet crs_range_set; PCMachineState *pcms = PC_MACHINE(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(machine); uint32_t nr_mem = machine->ram_slots; @@ -1984,6 +2004,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, } aml_append(dsdt, scope); + crs_range_set_init(&crs_range_set); bus = PC_MACHINE(machine)->bus; if (bus) { QLIST_FOREACH(bus, &bus->child, sibling) { @@ -2010,8 +2031,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, } aml_append(dev, build_prt(false)); - crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), - io_ranges, mem_ranges); + crs = build_crs(PCI_HOST_BRIDGE(BUS(bus)->parent), &crs_range_set); aml_append(dev, aml_name_decl("_CRS", crs)); aml_append(scope, dev); aml_append(dsdt, scope); @@ -2032,9 +2052,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, AML_POS_DECODE, AML_ENTIRE_RANGE, 0x0000, 0x0000, 0x0CF7, 0x0000, 0x0CF8)); - crs_replace_with_free_ranges(io_ranges, 0x0D00, 0xFFFF); - for (i = 0; i < io_ranges->len; i++) { - entry = g_ptr_array_index(io_ranges, i); + crs_replace_with_free_ranges(crs_range_set.io_ranges, 0x0D00, 0xFFFF); + for (i = 0; i < crs_range_set.io_ranges->len; i++) { + entry = g_ptr_array_index(crs_range_set.io_ranges, i); aml_append(crs, aml_word_io(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE, AML_ENTIRE_RANGE, @@ -2047,9 +2067,10 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, AML_CACHEABLE, AML_READ_WRITE, 0, 0x000A0000, 0x000BFFFF, 0, 0x00020000)); - crs_replace_with_free_ranges(mem_ranges, pci->w32.begin, pci->w32.end - 1); - for (i = 0; i < mem_ranges->len; i++) { - entry = g_ptr_array_index(mem_ranges, i); + crs_replace_with_free_ranges(crs_range_set.mem_ranges, + pci->w32.begin, pci->w32.end - 1); + for (i = 0; i < crs_range_set. mem_ranges->len; i++) { + entry = g_ptr_array_index(crs_range_set.mem_ranges, i); aml_append(crs, aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED, AML_NON_CACHEABLE, AML_READ_WRITE, @@ -2084,8 +2105,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_CRS", crs)); aml_append(scope, dev); - g_ptr_array_free(io_ranges, true); - g_ptr_array_free(mem_ranges, true); + crs_range_set_free(&crs_range_set); /* reserve PCIHP resources */ if (pm->pcihp_io_len) {
Instead of always passing both IO and MEM ranges when computing CRS ranges, define a new CrsRangeSet structure that include them both. This is done before introducing a third type of range, 64-bit MEM, so it will be easier to pass them all around. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> --- hw/i386/acpi-build.c | 82 ++++++++++++++++++++++++++++++++-------------------- 1 file changed, 51 insertions(+), 31 deletions(-)