From patchwork Wed Sep 8 13:58:57 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Improve cmpxchg emulation. Date: Wed, 08 Sep 2010 03:58:57 -0000 From: Jonathan A. Kollasch X-Patchwork-Id: 64135 Message-Id: <1283954337-28760-1-git-send-email-jakllsch@kollasch.net> To: qemu-devel@nongnu.org Cc: "Jonathan A. Kollasch" Change the accumulator only after performing the redundant write during cmpxchg. This fixes pthreaded programs using fork() in NetBSD/i386 guests. >From Andreas Gustafsson in https://bugs.launchpad.net/qemu/+bug/569760. Signed-off-by: Jonathan A. Kollasch --- target-i386/translate.c | 12 ++++++++---- 1 files changed, 8 insertions(+), 4 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 7b6e3c2..391830f 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -4879,20 +4879,24 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start) tcg_gen_sub_tl(t2, cpu_regs[R_EAX], t0); gen_extu(ot, t2); tcg_gen_brcondi_tl(TCG_COND_EQ, t2, 0, label1); + label2 = gen_new_label(); if (mod == 3) { - label2 = gen_new_label(); gen_op_mov_reg_v(ot, R_EAX, t0); tcg_gen_br(label2); gen_set_label(label1); gen_op_mov_reg_v(ot, rm, t1); - gen_set_label(label2); } else { - tcg_gen_mov_tl(t1, t0); + /* perform no-op store cycle like physical cpu; must be + before changing accumulator to ensure idempotency if + the store faults and the instruction is restarted + */ + gen_op_st_v(ot + s->mem_index, t0, a0); gen_op_mov_reg_v(ot, R_EAX, t0); + tcg_gen_br(label2); gen_set_label(label1); - /* always store */ gen_op_st_v(ot + s->mem_index, t1, a0); } + gen_set_label(label2); tcg_gen_mov_tl(cpu_cc_src, t0); tcg_gen_mov_tl(cpu_cc_dst, t2); s->cc_op = CC_OP_SUBB + ot;