[PULL,00/10] target-mips queue

Hi,

This pull request contains patches from Aleksandar which unlock
the IEEE 754-2008 support for MIPS.

Thanks,
Leon

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Aurelien Jarno <aurelien@aurel32.net>

The following changes since commit c7288767523f6510cf557707d3eb5e78e519b90d:

  Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160623' into staging (2016-06-23 11:53:14 +0100)

are available in the git repository at:

  git://github.com/lalrae/qemu.git tags/mips-20160624

for you to fetch changes up to 77be419980114d75605811e1681115d0919cfa1a:

  target-mips: Add FCR31's FS bit definition (2016-06-24 13:43:53 +0100)

----------------------------------------------------------------
MIPS patches 2016-06-24

Changes:
* support IEEE 754-2008 in MIPS CPUs

----------------------------------------------------------------
Aleksandar Markovic (10):
      softfloat: Implement run-time-configurable meaning of signaling NaN bit
      softfloat: Clean code format in fpu/softfloat-specialize.h
      softfloat: For Mips only, correct default NaN values
      softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd()
      linux-user: Update preprocessor constants for Mips-specific e_flags bits
      target-mips: Activate IEEE 754-2008 signaling NaN bit meaning for MSA
      target-mips: Add abs2008 flavor of <ABS|NEG>.<S|D>
      target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>
      target-mips: Implement FCR31's R/W bitmask and related functionalities
      target-mips: Add FCR31's FS bit definition

 fpu/softfloat-specialize.h    | 659 +++++++++++++++++++++---------------------
 fpu/softfloat.c               | 172 +++++------
 include/elf.h                 |   2 +
 include/fpu/softfloat.h       |  45 +--
 linux-user/main.c             |  14 +
 target-arm/helper-a64.c       |  14 +-
 target-arm/helper.c           |  40 +--
 target-m68k/helper.c          |   6 +-
 target-microblaze/op_helper.c |   6 +-
 target-mips/cpu.h             |  16 +-
 target-mips/gdbstub.c         |   8 +-
 target-mips/helper.h          |  22 +-
 target-mips/msa_helper.c      |  88 +++---
 target-mips/op_helper.c       | 400 ++++++++++++++++++++++---
 target-mips/translate.c       | 156 ++++++++--
 target-mips/translate_init.c  |  29 ++
 target-ppc/fpu_helper.c       | 120 ++++----
 target-s390x/fpu_helper.c     |  28 +-
 target-s390x/helper.h         |   6 +-
 target-s390x/translate.c      |   6 +-
 target-sh4/cpu.c              |   1 +
 target-unicore32/cpu.c        |   2 +
 22 files changed, 1167 insertions(+), 673 deletions(-)

On 26 June 2016 at 14:38, Leon Alrae <leon.alrae@imgtec.com> wrote:
> Hi,
>
> This pull request contains patches from Aleksandar which unlock
> the IEEE 754-2008 support for MIPS.
>
> Thanks,
> Leon
>
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
>
> The following changes since commit c7288767523f6510cf557707d3eb5e78e519b90d:
>
>   Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160623' into staging (2016-06-23 11:53:14 +0100)
>
> are available in the git repository at:
>
>   git://github.com/lalrae/qemu.git tags/mips-20160624
>
> for you to fetch changes up to 77be419980114d75605811e1681115d0919cfa1a:
>
>   target-mips: Add FCR31's FS bit definition (2016-06-24 13:43:53 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2016-06-24
>
> Changes:
> * support IEEE 754-2008 in MIPS CPUs

Applied, thanks.

-- PMM