diff mbox

[U-Boot] dm: Sort the uclass id in alphabetical order

Message ID 1466587787-18225-1-git-send-email-bmeng.cn@gmail.com
State Accepted
Commit 6f0e7a36efbb30fb7a100f5a6f421b0310815815
Delegated to: Simon Glass
Headers show

Commit Message

Bin Meng June 22, 2016, 9:29 a.m. UTC
Some uclass ids are out of order. Per the comments, sort them
in alphabetical order.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 include/dm/uclass-id.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Simon Glass June 26, 2016, 2:53 a.m. UTC | #1
On 22 June 2016 at 03:29, Bin Meng <bmeng.cn@gmail.com> wrote:
> Some uclass ids are out of order. Per the comments, sort them
> in alphabetical order.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  include/dm/uclass-id.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass July 3, 2016, 11:26 p.m. UTC | #2
On 25 June 2016 at 20:53, Simon Glass <sjg@chromium.org> wrote:
> On 22 June 2016 at 03:29, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Some uclass ids are out of order. Per the comments, sort them
>> in alphabetical order.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  include/dm/uclass-id.h | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-dm/next, thanks!
diff mbox

Patch

diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index b768660..c5cdfc7 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -33,7 +33,6 @@  enum uclass_id {
 	UCLASS_CROS_EC,		/* Chrome OS EC */
 	UCLASS_DISPLAY,		/* Display (e.g. DisplayPort, HDMI) */
 	UCLASS_DMA,		/* Direct Memory Access */
-	UCLASS_RAM,		/* RAM controller */
 	UCLASS_ETH,		/* Ethernet device */
 	UCLASS_GPIO,		/* Bank of general-purpose I/O pins */
 	UCLASS_I2C,		/* I2C bus */
@@ -56,11 +55,12 @@  enum uclass_id {
 	UCLASS_PCH,		/* x86 platform controller hub */
 	UCLASS_PCI,		/* PCI bus */
 	UCLASS_PCI_GENERIC,	/* Generic PCI bus device */
-	UCLASS_PINCTRL,		/* Pinctrl (pin muxing/configuration) device */
 	UCLASS_PINCONFIG,	/* Pin configuration node device */
+	UCLASS_PINCTRL,		/* Pinctrl (pin muxing/configuration) device */
 	UCLASS_PMIC,		/* PMIC I/O device */
 	UCLASS_PWM,		/* Pulse-width modulator */
 	UCLASS_PWRSEQ,		/* Power sequence device */
+	UCLASS_RAM,		/* RAM controller */
 	UCLASS_REGULATOR,	/* Regulator device */
 	UCLASS_REMOTEPROC,	/* Remote Processor device */
 	UCLASS_RESET,		/* Reset controller device */