From patchwork Mon Jun 20 20:33:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 638238 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rYMyr4qRCz9t0N for ; Tue, 21 Jun 2016 06:34:08 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=tLbA7RRf; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:from:date:message-id :subject:to:content-type; q=dns; s=default; b=dS2DmCcqPTlB2QZFHn UPWO0pRpJotk7XHsJV3R8LK/rKR+W4MHr1Cc7J4Nm5NYz61jSnz96hiHcSwKTJa/ 861XWDSV43EtsVqB9h0KwSWF6UHkEa5sD5GUCNWOxXVU2reO7AUTvqvxqDNeDCdn +0AT5viwVzQiOaP9UvE745OvE= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:from:date:message-id :subject:to:content-type; s=default; bh=Jk9jd9H5ftxjtikEMzckrKWf 3+k=; b=tLbA7RRfvHB69XdxFfd5wENSY2ikJOnrZa4kTfqt+pQgc22AEhcNwC1x tqcfxY7ioPZXEcQ0/HLDLY8OVwWExZKxjPFxBAmvn1l+3YN637dBVEkiZgkP3o63 yf87eyMBWh3DhgWobz1AY5XGQjjoFWAdymip9tbYcNtukq/vDwg= Received: (qmail 18605 invoked by alias); 20 Jun 2016 20:34:01 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 18592 invoked by uid 89); 20 Jun 2016 20:34:00 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.3 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 spammy=H*Ad:D*googlemail.com, hongjiuluintelcom, hongjiu.lu@intel.com, ubizjakgmailcom X-HELO: mail-qk0-f174.google.com Received: from mail-qk0-f174.google.com (HELO mail-qk0-f174.google.com) (209.85.220.174) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Mon, 20 Jun 2016 20:33:50 +0000 Received: by mail-qk0-f174.google.com with SMTP id t127so56904404qkf.1 for ; Mon, 20 Jun 2016 13:33:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to; bh=xEnSDwtO9+S5ON2A81Ji9JZvRKnliDzssNMe9RgJ/mI=; b=Qdt227mwey3H0wniZ34cLLuRs2RZVvF3/324AXre+S2gt6uv74TLLgVYIVh3C0n/OO QkmRa3zZzY+oT9GFYCVcfXue9VMfcUT+AVMC0xMUu8MJwCNqhz589cEEO3UzFg7Zbcwr SnsFm8/a3zVFg8fInotlfA3kuyliPqiKiibFlV4+p3H2l0+Z1wvBa9osbxNbzEJNOT2d 9d4Ou8y4W5Q8oVlWj88PKIm+PzGObYN3CC0zXPVvNyhPaoV1w2/PQD4i4fNDqDyF8zkT brSEqA2nCH8JKly/LwiNMiH5hbTz4ygorCtnpJu0na7Bbhi/PVU+4mydn4XXT+m+bGkQ +stg== X-Gm-Message-State: ALyK8tJILNS1Cg3br+BqK5MnCaCi+xH8B74hfQ4+mUzRgBbiQ2wQOFIx39QdKyiUFbuOY4mh26dfILE2VTxDSA== X-Received: by 10.200.50.140 with SMTP id z12mr24568934qta.1.1466454828193; Mon, 20 Jun 2016 13:33:48 -0700 (PDT) MIME-Version: 1.0 Received: by 10.55.221.7 with HTTP; Mon, 20 Jun 2016 13:33:47 -0700 (PDT) In-Reply-To: <87shw7d4nl.fsf@googlemail.com> References: <20160620170501.GA18281@intel.com> <87shw7d4nl.fsf@googlemail.com> From: "H.J. Lu" Date: Mon, 20 Jun 2016 13:33:47 -0700 Message-ID: Subject: Re: [PATCH] x86-64: Load external function address via GOT slot To: Uros Bizjak , "gcc-patches@gcc.gnu.org" , Jakub Jelinek , Richard Sandiford X-IsSubscribed: yes On Mon, Jun 20, 2016 at 12:46 PM, Richard Sandiford wrote: > Uros Bizjak writes: >> On Mon, Jun 20, 2016 at 9:19 PM, H.J. Lu wrote: >>> On Mon, Jun 20, 2016 at 12:13 PM, Uros Bizjak wrote: >>>> On Mon, Jun 20, 2016 at 7:05 PM, H.J. Lu wrote: >>>>> Hi, >>>>> >>>>> This patch implements the alternate code sequence recommended in >>>>> >>>>> https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI >>>>> >>>>> to load external function address via GOT slot with >>>>> >>>>> movq func@GOTPCREL(%rip), %rax >>>>> >>>>> so that linker won't create an PLT entry for extern function >>>>> address. >>>>> >>>>> Tested on x86-64. OK for trunk? >>>> >>>>> + else if (ix86_force_load_from_GOT_p (op1)) >>>>> + { >>>>> + /* Load the external function address via the GOT slot to >>>>> + avoid PLT. */ >>>>> + op1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op1), >>>>> + (TARGET_64BIT >>>>> + ? UNSPEC_GOTPCREL >>>>> + : UNSPEC_GOT)); >>>>> + op1 = gen_rtx_CONST (Pmode, op1); >>>>> + op1 = gen_const_mem (Pmode, op1); >>>>> + /* This symbol must be referenced via a load from the Global >>>>> + Offset Table. */ >>>>> + set_mem_alias_set (op1, ix86_GOT_alias_set ()); >>>>> + op1 = convert_to_mode (mode, op1, 1); >>>>> + op1 = force_reg (mode, op1); >>>>> + emit_insn (gen_rtx_SET (op0, op1)); >>>>> + /* Generate a CLOBBER so that there will be no REG_EQUAL note >>>>> + on the last insn to prevent cse and fwprop from replacing >>>>> + a GOT load with a constant. */ >>>>> + rtx tmp = gen_reg_rtx (Pmode); >>>>> + emit_clobber (tmp); >>>>> + return; >>>> >>>> Jeff, is this the recommended way to prevent CSE, as far as RTL >>>> infrastructure is concerned? I didn't find any example of this >>>> approach with other targets. >>>> >>> >>> FWIW, the similar approach is used in ix86_expand_vector_move_misalign, >>> ix86_expand_convert_uns_didf_sse and ix86_expand_vector_init_general >>> as well as other targets: >>> >>> frv/frv.c: emit_clobber (op0); >>> frv/frv.c: emit_clobber (op1); >>> im32c/m32c.c: /* emit_clobber (gen_rtx_REG (HImode, R0L_REGNO)); */ >>> s390/s390.c: emit_clobber (addr); >>> s390/s390.md: emit_clobber (reg0); >>> s390/s390.md: emit_clobber (reg1); >>> s390/s390.md: emit_clobber (reg0); >>> s390/s390.md: emit_clobber (reg0); >>> s390/s390.md: emit_clobber (reg1); >> >> These usages mark the whole register as being "clobbered" >> (=undefined), before only a part of register is written, e.g.: >> >> emit_clobber (int_xmm); >> emit_move_insn (gen_lowpart (DImode, int_xmm), input); >> >> They aren't used to prevent unwanted CSE. > > Since it's being called in the move expander, I thought the normal > way of preventing the constant being rematerialised would be to reject > it in the move define_insn predicates. > > FWIW, I agree that using a clobber for this is going to be fragile. > Here is the alternative from clobber. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index a68983c..79999df 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2347,7 +2347,7 @@ (define_insn "*movsi_internal" [(set (match_operand:SI 0 "nonimmediate_operand" "=r,m ,*y,*y,?rm,?*y,*v,*v,*v,m ,?r ,?r,?*Yi,*k ,*rm") - (match_operand:SI 1 "general_operand" + (match_operand:SI 1 "ix86_general_operand" "g ,re,C ,*y,*y ,rm ,C ,*v,m ,*v,*Yj,*v,r ,*krm,*k"))] "!(MEM_P (operands[0]) && MEM_P (operands[1]))" { @@ -2564,7 +2564,7 @@ (define_insn "*movqi_internal" [(set (match_operand:QI 0 "nonimmediate_operand" "=q,q ,q ,r,r ,?r,m ,k,k,r ,m,k") - (match_operand:QI 1 "general_operand" + (match_operand:QI 1 "ix86_general_operand" "q ,qn,qm,q,rn,qm,qn,r ,k,k,k,m"))] "!(MEM_P (operands[0]) && MEM_P (operands[1]))" { diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 06a0002..a471deb 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -367,6 +367,12 @@ } }) +;; Return true if OP is general operand representable on ix86 +(define_predicate "ix86_general_operand" + (and (match_operand 0 "general_operand") + (ior (not (match_code "symbol_ref")) + (match_test "!ix86_force_load_from_GOT_p (op)")))) + ;; Return true if size of VALUE can be stored in a sign ;; extended immediate field. (define_predicate "x86_64_immediate_size_operand" @@ -1036,6 +1042,9 @@ struct ix86_address parts; int ok; + if (ix86_force_load_from_GOT_p (op)) + return false; + if (!CONST_INT_P (op) && mode != VOIDmode && GET_MODE (op) != mode)