[PATCHv4,4/7] Documentation: dt: socfpga: Add Arria10 Ethernet binding
diff mbox

Message ID 1466434252-26107-5-git-send-email-tthayer@opensource.altera.com
State Changes Requested, archived
Headers show

Commit Message

tthayer@opensource.altera.com June 20, 2016, 2:50 p.m. UTC
From: Thor Thayer <tthayer@opensource.altera.com>

Add the device tree bindings needed to support the Altera Ethernet
FIFO buffers on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
---
v2  No Change
v3  Change to common compatible string based on maintainer comments
    Add local IRQ values.
v4  Add compatible string for parent node.
---
 .../bindings/arm/altera/socfpga-eccmgr.txt         |   24 ++++++++++++++++++++
 1 file changed, 24 insertions(+)

Comments

Rob Herring June 21, 2016, 1:33 p.m. UTC | #1
On Mon, Jun 20, 2016 at 09:50:49AM -0500, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
> 
> Add the device tree bindings needed to support the Altera Ethernet
> FIFO buffers on the Arria10 chip.
> 
> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
> ---
> v2  No Change
> v3  Change to common compatible string based on maintainer comments
>     Add local IRQ values.
> v4  Add compatible string for parent node.
> ---
>  .../bindings/arm/altera/socfpga-eccmgr.txt         |   24 ++++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
> index 15eb0df..7c714ba 100644
> --- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
> @@ -82,6 +82,14 @@ Required Properties:
>  - interrupts : Should be single bit error interrupt, then double bit error
>  	interrupt, in this order.
>  
> +Ethernet FIFO ECC
> +Required Properties:
> +- compatible : Should be "altr,socfpga-eth-mac-ecc"
> +- reg        : Address and size for ECC block registers.
> +- parent     : phandle to parent (altr,socfpga-stmmac) Ethernet node.

Sorry if I wasn't clear before, but I was suggesting changing 'parent' 
to 'altr,ethernet-mac':

altr,ethernet-mac = <&gmac0>;

Rob
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tthayer@opensource.altera.com June 21, 2016, 2:46 p.m. UTC | #2
Hi Rob,

On 06/21/2016 08:33 AM, Rob Herring wrote:
> On Mon, Jun 20, 2016 at 09:50:49AM -0500, tthayer@opensource.altera.com wrote:
>> From: Thor Thayer <tthayer@opensource.altera.com>
>>
>> Add the device tree bindings needed to support the Altera Ethernet
>> FIFO buffers on the Arria10 chip.
>>
>> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
>> ---
>> v2  No Change
>> v3  Change to common compatible string based on maintainer comments
>>      Add local IRQ values.
>> v4  Add compatible string for parent node.
>> ---
>>   .../bindings/arm/altera/socfpga-eccmgr.txt         |   24 ++++++++++++++++++++
>>   1 file changed, 24 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>> index 15eb0df..7c714ba 100644
>> --- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>> @@ -82,6 +82,14 @@ Required Properties:
>>   - interrupts : Should be single bit error interrupt, then double bit error
>>   	interrupt, in this order.
>>
>> +Ethernet FIFO ECC
>> +Required Properties:
>> +- compatible : Should be "altr,socfpga-eth-mac-ecc"
>> +- reg        : Address and size for ECC block registers.
>> +- parent     : phandle to parent (altr,socfpga-stmmac) Ethernet node.
>
> Sorry if I wasn't clear before, but I was suggesting changing 'parent'
> to 'altr,ethernet-mac':
>
> altr,ethernet-mac = <&gmac0>;
>
> Rob
>
Ahh, I see what you're saying.

I used parent as the tag because I have a generic function for 
validating that the parent status is "okay" using the "parent" string in 
my validate_parent_available() function (see below).

I will be submitting other peripheral FIFOs with EDAC protection in 
future patches (USB, DMA, etc).

static int validate_parent_available(struct device_node *np)
{
	struct device_node *parent;
	int ret = 0;

	/* Ensure parent device is enabled if parent node exists */
	parent = of_parse_phandle(np, "parent", 0);
	if (parent && !of_device_is_available(parent))
		ret = -ENODEV;
	of_node_put(parent);
	return ret;
}


I can change this to using a passed in data string but the code won't be 
as straightforward.

Thanks for reviewing,

Thor
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Rob Herring June 21, 2016, 3:48 p.m. UTC | #3
On Tue, Jun 21, 2016 at 9:46 AM, Thor Thayer
<tthayer@opensource.altera.com> wrote:
> Hi Rob,
>
>
> On 06/21/2016 08:33 AM, Rob Herring wrote:
>>
>> On Mon, Jun 20, 2016 at 09:50:49AM -0500, tthayer@opensource.altera.com
>> wrote:
>>>
>>> From: Thor Thayer <tthayer@opensource.altera.com>
>>>
>>> Add the device tree bindings needed to support the Altera Ethernet
>>> FIFO buffers on the Arria10 chip.
>>>
>>> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
>>> ---
>>> v2  No Change
>>> v3  Change to common compatible string based on maintainer comments
>>>      Add local IRQ values.
>>> v4  Add compatible string for parent node.
>>> ---
>>>   .../bindings/arm/altera/socfpga-eccmgr.txt         |   24
>>> ++++++++++++++++++++
>>>   1 file changed, 24 insertions(+)
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>>> b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>>> index 15eb0df..7c714ba 100644
>>> --- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>>> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>>> @@ -82,6 +82,14 @@ Required Properties:
>>>   - interrupts : Should be single bit error interrupt, then double bit
>>> error
>>>         interrupt, in this order.
>>>
>>> +Ethernet FIFO ECC
>>> +Required Properties:
>>> +- compatible : Should be "altr,socfpga-eth-mac-ecc"
>>> +- reg        : Address and size for ECC block registers.
>>> +- parent     : phandle to parent (altr,socfpga-stmmac) Ethernet node.
>>
>>
>> Sorry if I wasn't clear before, but I was suggesting changing 'parent'
>> to 'altr,ethernet-mac':
>>
>> altr,ethernet-mac = <&gmac0>;
>>
>> Rob
>>
> Ahh, I see what you're saying.
>
> I used parent as the tag because I have a generic function for validating
> that the parent status is "okay" using the "parent" string in my
> validate_parent_available() function (see below).

Ah, so common ecc-mgr code is parsing it. Then how about 'altr,ecc-parent'?

Rob
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tthayer@opensource.altera.com June 21, 2016, 3:57 p.m. UTC | #4
On 06/21/2016 10:48 AM, Rob Herring wrote:
> On Tue, Jun 21, 2016 at 9:46 AM, Thor Thayer
> <tthayer@opensource.altera.com> wrote:
>> Hi Rob,
>>
>>
>> On 06/21/2016 08:33 AM, Rob Herring wrote:
>>>
>>> On Mon, Jun 20, 2016 at 09:50:49AM -0500, tthayer@opensource.altera.com
>>> wrote:
>>>>
>>>> From: Thor Thayer <tthayer@opensource.altera.com>
>>>>
>>>> Add the device tree bindings needed to support the Altera Ethernet
>>>> FIFO buffers on the Arria10 chip.
>>>>
>>>> Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
>>>> ---
>>>> v2  No Change
>>>> v3  Change to common compatible string based on maintainer comments
>>>>       Add local IRQ values.
>>>> v4  Add compatible string for parent node.
>>>> ---
>>>>    .../bindings/arm/altera/socfpga-eccmgr.txt         |   24
>>>> ++++++++++++++++++++
>>>>    1 file changed, 24 insertions(+)
>>>>
>>>> diff --git
>>>> a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>>>> b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>>>> index 15eb0df..7c714ba 100644
>>>> --- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>>>> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
>>>> @@ -82,6 +82,14 @@ Required Properties:
>>>>    - interrupts : Should be single bit error interrupt, then double bit
>>>> error
>>>>          interrupt, in this order.
>>>>
>>>> +Ethernet FIFO ECC
>>>> +Required Properties:
>>>> +- compatible : Should be "altr,socfpga-eth-mac-ecc"
>>>> +- reg        : Address and size for ECC block registers.
>>>> +- parent     : phandle to parent (altr,socfpga-stmmac) Ethernet node.
>>>
>>>
>>> Sorry if I wasn't clear before, but I was suggesting changing 'parent'
>>> to 'altr,ethernet-mac':
>>>
>>> altr,ethernet-mac = <&gmac0>;
>>>
>>> Rob
>>>
>> Ahh, I see what you're saying.
>>
>> I used parent as the tag because I have a generic function for validating
>> that the parent status is "okay" using the "parent" string in my
>> validate_parent_available() function (see below).
>
> Ah, so common ecc-mgr code is parsing it. Then how about 'altr,ecc-parent'?
>
> Rob
>
That's clean - I'll change to that string. Thanks!
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Patch
diff mbox

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
index 15eb0df..7c714ba 100644
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
@@ -82,6 +82,14 @@  Required Properties:
 - interrupts : Should be single bit error interrupt, then double bit error
 	interrupt, in this order.
 
+Ethernet FIFO ECC
+Required Properties:
+- compatible : Should be "altr,socfpga-eth-mac-ecc"
+- reg        : Address and size for ECC block registers.
+- parent     : phandle to parent (altr,socfpga-stmmac) Ethernet node.
+- interrupts : Should be single bit error interrupt, then double bit error
+	interrupt, in this order.
+
 Example:
 
 	eccmgr: eccmgr@ffd06000 {
@@ -108,4 +116,20 @@  Example:
 			interrupts = <1 IRQ_TYPE_LEVEL_HIGH>,
 				     <33 IRQ_TYPE_LEVEL_HIGH> ;
 		};
+
+		emac0-rx-ecc@ff8c0800 {
+			compatible = "altr,socfpga-eth-mac-ecc";
+			reg = <0xff8c0800 0x400>;
+			parent = <&gmac0>;
+			interrupts = <4 IRQ_TYPE_LEVEL_HIGH>,
+				     <36 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		emac0-tx-ecc@ff8c0c00 {
+			compatible = "altr,socfpga-eth-mac-ecc";
+			reg = <0xff8c0c00 0x400>;
+			parent = <&gmac0>;
+			interrupts = <5 IRQ_TYPE_LEVEL_HIGH>,
+				     <37 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};