| Message ID | 1466386991-10469-3-git-send-email-sjg@chromium.org |
|---|---|
| State | Accepted |
| Commit | 6b424611a8dee0444459c0c205a9d72f65f61456 |
| Delegated to: | Tom Rini |
| Headers | show |
On 06/20/2016 03:43 AM, Simon Glass wrote: > At present armv7 will unhappily invalidate a cache region and print an > error message. Make it skip the operation instead, as it does with other > cache operations. > > Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de> > --- > > arch/arm/cpu/armv7/cache_v7.c | 23 ++--------------------- > 1 file changed, 2 insertions(+), 21 deletions(-) > > diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c > index 823a156..e59597e 100644 > --- a/arch/arm/cpu/armv7/cache_v7.c > +++ b/arch/arm/cpu/armv7/cache_v7.c > @@ -44,27 +44,8 @@ static void v7_dcache_inval_range(u32 start, u32 stop, u32 line_len) > { > u32 mva; > > - /* > - * If start address is not aligned to cache-line do not > - * invalidate the first cache-line > - */ > - if (start & (line_len - 1)) { > - printf("ERROR: %s - start address is not aligned - 0x%08x\n", > - __func__, start); > - /* move to next cache line */ > - start = (start + line_len - 1) & ~(line_len - 1); > - } > - > - /* > - * If stop address is not aligned to cache-line do not > - * invalidate the last cache-line > - */ > - if (stop & (line_len - 1)) { > - printf("ERROR: %s - stop address is not aligned - 0x%08x\n", > - __func__, stop); > - /* align to the beginning of this cache line */ > - stop &= ~(line_len - 1); > - } > + if (!check_cache_range(start, stop)) > + return; > > for (mva = start; mva < stop; mva = mva + line_len) { > /* DCIMVAC - Invalidate data cache by MVA to PoC */ >
On Sun, Jun 19, 2016 at 07:43:02PM -0600, Simon Glass wrote: > At present armv7 will unhappily invalidate a cache region and print an > error message. Make it skip the operation instead, as it does with other > cache operations. > > Signed-off-by: Simon Glass <sjg@chromium.org> > Reviewed-by: Marek Vasut <marex@denx.de> Applied to u-boot/master, thanks!
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index 823a156..e59597e 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -44,27 +44,8 @@ static void v7_dcache_inval_range(u32 start, u32 stop, u32 line_len) { u32 mva; - /* - * If start address is not aligned to cache-line do not - * invalidate the first cache-line - */ - if (start & (line_len - 1)) { - printf("ERROR: %s - start address is not aligned - 0x%08x\n", - __func__, start); - /* move to next cache line */ - start = (start + line_len - 1) & ~(line_len - 1); - } - - /* - * If stop address is not aligned to cache-line do not - * invalidate the last cache-line - */ - if (stop & (line_len - 1)) { - printf("ERROR: %s - stop address is not aligned - 0x%08x\n", - __func__, stop); - /* align to the beginning of this cache line */ - stop &= ~(line_len - 1); - } + if (!check_cache_range(start, stop)) + return; for (mva = start; mva < stop; mva = mva + line_len) { /* DCIMVAC - Invalidate data cache by MVA to PoC */
At present armv7 will unhappily invalidate a cache region and print an error message. Make it skip the operation instead, as it does with other cache operations. Signed-off-by: Simon Glass <sjg@chromium.org> --- arch/arm/cpu/armv7/cache_v7.c | 23 ++--------------------- 1 file changed, 2 insertions(+), 21 deletions(-)