diff mbox

Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259)

Message ID CAKdteOZmQSZwq_HLr6XVc2Z0BkO=OfUSyY3Mo0Tbc7r4yNT6aw@mail.gmail.com
State New
Headers show

Commit Message

Christophe Lyon June 15, 2016, 8:45 a.m. UTC 
On 9 June 2016 at 14:46, Jakub Jelinek <jakub@redhat.com> wrote:
> On Thu, Jun 09, 2016 at 02:40:43PM +0200, Christophe Lyon wrote:
>> > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler);
>> > call or after it.  If before, then I guess you'd better rewrite the
>> >     long long a = 0, b = 1;
>> >     asm ("vorr %P0, %P1, %P2"
>> >          : "=w" (a)
>> >          : "0" (a), "w" (b));
>> >     if (a != 1)
>>
>> Of course you are right: it happens just before the call to signal,
>> to build the sig_ill_handler address in r1.
>>
>> So it's not even a problem with rewriting the asm.
>
> Ugh, so the added options don't affect just vectorized code, but normal
> integer only code?
> check_vect is fragile, there is always a risk that some instruction is
> scheduled before the call.

Yes, here it's an instruction used to build a parameter of the call.

> If you have working target attribute support, I think you should compile
> check_vect with attribute set to some lowest common denominator that every
> ARM CPU supports (if there is any, that is).  Though most likely you'll need
> to tweak the inline asm, because maybe "w" constraint won't be available
> then.

ARM does not support attribute/pragma cpu :(

Here is a new patch version, which removes the hardcoded dg-do run directives,
so that tests use compile or run depending on the result of
check_vect_support_and_set_flags.

On ARM, this first uses arm_neon_ok to detect the required flags, then
depending on
arm_neon_hw, it decides whether to dg-do run or compile.

OK?

Christophe

>         Jakub
gcc/testsuite/ChangeLog:

2016-06-15  Christophe Lyon  <christophe.lyon@linaro.org>

	* g++.dg/vect/pr33834_2.cc: Use dg-additional options instead of
	dg-options.
	* g++.dg/vect/pr33860a.cc: Likewise.
	* g++.dg/vect/pr45470-a.cc: Likewise.
	* g++.dg/vect/pr45470-b.cc: Likewise.
	* g++.dg/vect/pr60896.cc: Likewise.
	* gcc.dg/vect/no-tree-pre-pr45241.c: Likewise.
	* gcc.dg/vect/pr18308.c: Likewise.
	* gcc.dg/vect/pr24049.c: Likewise.
	* gcc.dg/vect/pr33373.c: Likewise.
	* gcc.dg/vect/pr36228.c: Likewise.
	* gcc.dg/vect/pr42395.c: Likewise.
	* gcc.dg/vect/pr42604.c: Likewise.
	* gcc.dg/vect/pr46663.c: Likewise.
	* gcc.dg/vect/pr48765.c: Likewise.
	* gcc.dg/vect/pr49093.c: Likewise.
	* gcc.dg/vect/pr49352.c: Likewise.
	* gcc.dg/vect/pr52298.c: Likewise.
	* gcc.dg/vect/pr52870.c: Likewise.
	* gcc.dg/vect/pr53185.c: Likewise.
	* gcc.dg/vect/pr53773.c: Likewise.
	* gcc.dg/vect/pr56695.c: Likewise.
	* gcc.dg/vect/pr62171.c: Likewise.
	* gcc.dg/vect/pr63530.c: Likewise.
	* gcc.dg/vect/pr68339.c: Likewise.
	* gcc.dg/vect/vect-82_64.c: Likewise.
	* gcc.dg/vect/vect-83_64.c: Likewise.
	* gcc.dg/vect/vect-debug-pr41926.c: Likewise.
	* gcc.dg/vect/vect-fold-1.c: Likewise.
	* gcc.dg/vect/vect-shift-2-big-array.c: Likewise.
	* gcc.dg/vect/vect-shift-2.c: Likewise.
	* gcc.dg/vect/vect-singleton_1.c: Likewise.
	* gcc.dg/vect/O3-pr70130.c: Remove dg-do run.
	* gcc.dg/vect/pr70021.c: Likewise.
	* gcc.dg/vect/pr70138-1.c: Likewise.
	* gcc.dg/vect/pr70138-2.c: Likewise.
	* gcc.dg/vect/pr70354-1.c: Likewise.
	* gcc.dg/vect/pr70354-2.c: Likewise.
	* gcc.dg/vect/vect-nb-iter-ub-1.c: Likewise.
	* gcc.dg/vect/vect-nb-iter-ub-2.c: Likewise.
	* gcc.dg/vect/vect-nb-iter-ub-3.c: Likewise.
	* gcc.dg/vect/pr71259.c: Use dg-additional options instead of
	dg-options. Remove dg-do run.

Comments

Christophe Lyon June 21, 2016, 1:10 p.m. UTC | #1 
On 15 June 2016 at 10:45, Christophe Lyon <christophe.lyon@linaro.org> wrote:
> On 9 June 2016 at 14:46, Jakub Jelinek <jakub@redhat.com> wrote:
>> On Thu, Jun 09, 2016 at 02:40:43PM +0200, Christophe Lyon wrote:
>>> > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler);
>>> > call or after it.  If before, then I guess you'd better rewrite the
>>> >     long long a = 0, b = 1;
>>> >     asm ("vorr %P0, %P1, %P2"
>>> >          : "=w" (a)
>>> >          : "0" (a), "w" (b));
>>> >     if (a != 1)
>>>
>>> Of course you are right: it happens just before the call to signal,
>>> to build the sig_ill_handler address in r1.
>>>
>>> So it's not even a problem with rewriting the asm.
>>
>> Ugh, so the added options don't affect just vectorized code, but normal
>> integer only code?
>> check_vect is fragile, there is always a risk that some instruction is
>> scheduled before the call.
>
> Yes, here it's an instruction used to build a parameter of the call.
>
>> If you have working target attribute support, I think you should compile
>> check_vect with attribute set to some lowest common denominator that every
>> ARM CPU supports (if there is any, that is).  Though most likely you'll need
>> to tweak the inline asm, because maybe "w" constraint won't be available
>> then.
>
> ARM does not support attribute/pragma cpu :(
>
> Here is a new patch version, which removes the hardcoded dg-do run directives,
> so that tests use compile or run depending on the result of
> check_vect_support_and_set_flags.
>
> On ARM, this first uses arm_neon_ok to detect the required flags, then
> depending on
> arm_neon_hw, it decides whether to dg-do run or compile.
>
> OK?

ping?


>
> Christophe
>
>>         Jakub
Jakub Jelinek June 21, 2016, 1:13 p.m. UTC | #2 
On Tue, Jun 21, 2016 at 03:10:33PM +0200, Christophe Lyon wrote:
> > Here is a new patch version, which removes the hardcoded dg-do run directives,
> > so that tests use compile or run depending on the result of
> > check_vect_support_and_set_flags.
> >
> > On ARM, this first uses arm_neon_ok to detect the required flags, then
> > depending on
> > arm_neon_hw, it decides whether to dg-do run or compile.
> >
> > OK?
> 
> ping?

I'm not convinced we want to do this, even if the hw doesn't support it, the
dg-do run tests are tested for not just compilation, but also assembly and
linking; IMHO much better is to really fix up
check_vect so that it works on ARM as it does everywhere else, even if it
just means rewriting parts of it in inline asm.

	Jakub
Christophe Lyon June 21, 2016, 1:46 p.m. UTC | #3 
On 21 June 2016 at 15:13, Jakub Jelinek <jakub@redhat.com> wrote:
> On Tue, Jun 21, 2016 at 03:10:33PM +0200, Christophe Lyon wrote:
>> > Here is a new patch version, which removes the hardcoded dg-do run directives,
>> > so that tests use compile or run depending on the result of
>> > check_vect_support_and_set_flags.
>> >
>> > On ARM, this first uses arm_neon_ok to detect the required flags, then
>> > depending on
>> > arm_neon_hw, it decides whether to dg-do run or compile.
>> >
>> > OK?
>>
>> ping?
>
> I'm not convinced we want to do this, even if the hw doesn't support it, the
> dg-do run tests are tested for not just compilation, but also assembly and
> linking; IMHO much better is to really fix up
> check_vect so that it works on ARM as it does everywhere else, even if it
> just means rewriting parts of it in inline asm.
>

I'm not sure to follow: many other targets use dg-do compile if some "hw"
support is not present (see check_vect_support_and_set_flags for
powerpc, sparc, alpha, x86).

Do you mean that on these targets, we want to run the tests, even if
the hw does not support the required features and that removing dg-do run
will result is less coverage on these targets?

What about defaulting to 'assemble' instead of 'compile' ?

>         Jakub
diff mbox

Patch

diff --git a/gcc/testsuite/g++.dg/vect/pr33834_2.cc b/gcc/testsuite/g++.dg/vect/pr33834_2.cc
index ecaf588..49e72d2 100644
--- a/gcc/testsuite/g++.dg/vect/pr33834_2.cc
+++ b/gcc/testsuite/g++.dg/vect/pr33834_2.cc
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O3 -ftree-vectorize" } */
+/* { dg-additional-options "-O3 -ftree-vectorize" } */
 
 /* Testcase by Martin Michlmayr <tbm@cyrius.com> */
 
diff --git a/gcc/testsuite/g++.dg/vect/pr33860a.cc b/gcc/testsuite/g++.dg/vect/pr33860a.cc
index 0e5164f..bbfdeef 100644
--- a/gcc/testsuite/g++.dg/vect/pr33860a.cc
+++ b/gcc/testsuite/g++.dg/vect/pr33860a.cc
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
+/* { dg-additional-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */
 
 /* Testcase by Martin Michlmayr <tbm@cyrius.com> */
 
diff --git a/gcc/testsuite/g++.dg/vect/pr45470-a.cc b/gcc/testsuite/g++.dg/vect/pr45470-a.cc
index 98ce4ca..ba5873c 100644
--- a/gcc/testsuite/g++.dg/vect/pr45470-a.cc
+++ b/gcc/testsuite/g++.dg/vect/pr45470-a.cc
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O1 -ftree-vectorize -fnon-call-exceptions" } */
+/* { dg-additional-options "-O1 -ftree-vectorize -fnon-call-exceptions" } */
 
 struct A
 {
diff --git a/gcc/testsuite/g++.dg/vect/pr45470-b.cc b/gcc/testsuite/g++.dg/vect/pr45470-b.cc
index 3ad66ec..ce04f8e 100644
--- a/gcc/testsuite/g++.dg/vect/pr45470-b.cc
+++ b/gcc/testsuite/g++.dg/vect/pr45470-b.cc
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O1 -ftree-vectorize -fno-vect-cost-model -fnon-call-exceptions" } */
+/* { dg-additional-options "-O1 -ftree-vectorize -fno-vect-cost-model -fnon-call-exceptions" } */
 
 template < typename _Tp > struct new_allocator
 {
diff --git a/gcc/testsuite/g++.dg/vect/pr60896.cc b/gcc/testsuite/g++.dg/vect/pr60896.cc
index c6ce68b..b4ff0d3 100644
--- a/gcc/testsuite/g++.dg/vect/pr60896.cc
+++ b/gcc/testsuite/g++.dg/vect/pr60896.cc
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O3" } */
+/* { dg-additional-options "-O3" } */
 
 struct A
 {
diff --git a/gcc/testsuite/gcc.dg/vect/O3-pr70130.c b/gcc/testsuite/gcc.dg/vect/O3-pr70130.c
index e9938c2..288982f 100644
--- a/gcc/testsuite/gcc.dg/vect/O3-pr70130.c
+++ b/gcc/testsuite/gcc.dg/vect/O3-pr70130.c
@@ -1,4 +1,3 @@ 
-/* { dg-do run } */
 /* { dg-require-effective-target vsx_hw { target powerpc*-*-* } } */
 /* { dg-additional-options "-mcpu=power7" { target powerpc*-*-* } } */
 
diff --git a/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c b/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c
index 54aa89b..00055b8 100644
--- a/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c
+++ b/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c
@@ -1,6 +1,6 @@ 
 /* PR tree-optimization/45241 */
 /* { dg-do compile } */
-/* { dg-options "-ftree-vectorize" } */
+/* { dg-additional-options "-ftree-vectorize" } */
 
 int
 foo (short x)
diff --git a/gcc/testsuite/gcc.dg/vect/pr18308.c b/gcc/testsuite/gcc.dg/vect/pr18308.c
index b71f08e..51bcc83 100644
--- a/gcc/testsuite/gcc.dg/vect/pr18308.c
+++ b/gcc/testsuite/gcc.dg/vect/pr18308.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O -ftree-vectorize -funroll-loops" } */
+/* { dg-additional-options "-O -ftree-vectorize -funroll-loops" } */
 void foo();
 
 void bar(int j)
diff --git a/gcc/testsuite/gcc.dg/vect/pr24049.c b/gcc/testsuite/gcc.dg/vect/pr24049.c
index a7798bd..dd3e94c 100644
--- a/gcc/testsuite/gcc.dg/vect/pr24049.c
+++ b/gcc/testsuite/gcc.dg/vect/pr24049.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O1 -ftree-vectorize --param ggc-min-heapsize=0 --param ggc-min-expand=0" } */
+/* { dg-additional-options "-O1 -ftree-vectorize --param ggc-min-heapsize=0 --param ggc-min-expand=0" } */
 
 void unscrunch (unsigned char *, int *);
 
diff --git a/gcc/testsuite/gcc.dg/vect/pr33373.c b/gcc/testsuite/gcc.dg/vect/pr33373.c
index efba2ab..7ab6223 100644
--- a/gcc/testsuite/gcc.dg/vect/pr33373.c
+++ b/gcc/testsuite/gcc.dg/vect/pr33373.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-Wno-shift-overflow" } */
+/* { dg-additional-options "-Wno-shift-overflow" } */
 /* { dg-do compile } */
 void DOSMEM_FillIsrTable(int*isr) {
     int i;
diff --git a/gcc/testsuite/gcc.dg/vect/pr36228.c b/gcc/testsuite/gcc.dg/vect/pr36228.c
index 5f17739..710cf95 100644
--- a/gcc/testsuite/gcc.dg/vect/pr36228.c
+++ b/gcc/testsuite/gcc.dg/vect/pr36228.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O3 -fdump-tree-vect-details" } */
+/* { dg-additional-options "-O3 -fdump-tree-vect-details" } */
 
 #define COLS         8
 #define ROWS         8
diff --git a/gcc/testsuite/gcc.dg/vect/pr42395.c b/gcc/testsuite/gcc.dg/vect/pr42395.c
index 7d0b832..540473b 100644
--- a/gcc/testsuite/gcc.dg/vect/pr42395.c
+++ b/gcc/testsuite/gcc.dg/vect/pr42395.c
@@ -1,6 +1,6 @@ 
 /* PR debug/42395 */
 /* { dg-do compile } */
-/* { dg-options "-O3 -ftree-vectorize -g" } */
+/* { dg-additional-options "-O3 -ftree-vectorize -g" } */
 
 void foo(int j, int *A)
 {
diff --git a/gcc/testsuite/gcc.dg/vect/pr42604.c b/gcc/testsuite/gcc.dg/vect/pr42604.c
index 4e05c23..1619f24 100644
--- a/gcc/testsuite/gcc.dg/vect/pr42604.c
+++ b/gcc/testsuite/gcc.dg/vect/pr42604.c
@@ -1,6 +1,6 @@ 
 /* PR debug/42604 */
 /* { dg-do compile } */
-/* { dg-options "-O3 -ftree-vectorize -g -ffast-math" } */
+/* { dg-additional-options "-O3 -ftree-vectorize -g -ffast-math" } */
 
 unsigned *d;
 unsigned short e;
diff --git a/gcc/testsuite/gcc.dg/vect/pr46663.c b/gcc/testsuite/gcc.dg/vect/pr46663.c
index 15f15a5..b42e114 100644
--- a/gcc/testsuite/gcc.dg/vect/pr46663.c
+++ b/gcc/testsuite/gcc.dg/vect/pr46663.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O -ftree-vectorize -fdump-tree-vect-details -fexceptions" } */
+/* { dg-additional-options "-O -ftree-vectorize -fdump-tree-vect-details -fexceptions" } */
 
 typedef __attribute__ ((const)) int (*bart) (void);
 
diff --git a/gcc/testsuite/gcc.dg/vect/pr48765.c b/gcc/testsuite/gcc.dg/vect/pr48765.c
index 978dc25..ae36437 100644
--- a/gcc/testsuite/gcc.dg/vect/pr48765.c
+++ b/gcc/testsuite/gcc.dg/vect/pr48765.c
@@ -1,6 +1,6 @@ 
 /* { dg-do compile { target { powerpc*-*-* } } } */
 /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */
-/* { dg-options "-O3 -mcpu=power6" } */
+/* { dg-additional-options "-O3 -mcpu=power6" } */
 
 enum reg_class
 {
diff --git a/gcc/testsuite/gcc.dg/vect/pr49093.c b/gcc/testsuite/gcc.dg/vect/pr49093.c
index 5a29506..9b3b7f4 100644
--- a/gcc/testsuite/gcc.dg/vect/pr49093.c
+++ b/gcc/testsuite/gcc.dg/vect/pr49093.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O1 -ftree-vectorize -fdump-tree-vect-details -fno-tree-fre" } */
+/* { dg-additional-options "-O1 -ftree-vectorize -fdump-tree-vect-details -fno-tree-fre" } */
 
 volatile unsigned char g_324[4] = {0, 1, 0, 1};
 void foo (int);
diff --git a/gcc/testsuite/gcc.dg/vect/pr49352.c b/gcc/testsuite/gcc.dg/vect/pr49352.c
index d8e0bae..0d3fc9c 100644
--- a/gcc/testsuite/gcc.dg/vect/pr49352.c
+++ b/gcc/testsuite/gcc.dg/vect/pr49352.c
@@ -1,6 +1,6 @@ 
 /* PR tree-optimization/49352 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -fcompare-debug" } */
+/* { dg-additional-options "-O2 -ftree-vectorize -fcompare-debug" } */
 /* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */
 
 int
diff --git a/gcc/testsuite/gcc.dg/vect/pr52298.c b/gcc/testsuite/gcc.dg/vect/pr52298.c
index 453d7c8..4aa5c0d 100644
--- a/gcc/testsuite/gcc.dg/vect/pr52298.c
+++ b/gcc/testsuite/gcc.dg/vect/pr52298.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O1 -ftree-vectorize -fno-tree-pre -fno-tree-loop-im" } */
+/* { dg-additional-options "-O1 -ftree-vectorize -fno-tree-pre -fno-tree-loop-im" } */
 
 extern void abort (void);
 int c[80];
diff --git a/gcc/testsuite/gcc.dg/vect/pr52870.c b/gcc/testsuite/gcc.dg/vect/pr52870.c
index 7b185ee..b89856a 100644
--- a/gcc/testsuite/gcc.dg/vect/pr52870.c
+++ b/gcc/testsuite/gcc.dg/vect/pr52870.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O1 -ftree-vectorize" } */
+/* { dg-additional-options "-O1 -ftree-vectorize" } */
 
 void foo (unsigned long int);
 
diff --git a/gcc/testsuite/gcc.dg/vect/pr53185.c b/gcc/testsuite/gcc.dg/vect/pr53185.c
index af1efba..adf208b 100644
--- a/gcc/testsuite/gcc.dg/vect/pr53185.c
+++ b/gcc/testsuite/gcc.dg/vect/pr53185.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O3 -ftree-vectorize" } */
+/* { dg-additional-options "-O3 -ftree-vectorize" } */
 unsigned short a, e;
 int *b, *d;
 int c;
diff --git a/gcc/testsuite/gcc.dg/vect/pr53773.c b/gcc/testsuite/gcc.dg/vect/pr53773.c
index 2be76d7..1bee98b 100644
--- a/gcc/testsuite/gcc.dg/vect/pr53773.c
+++ b/gcc/testsuite/gcc.dg/vect/pr53773.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-fdump-tree-optimized" } */
+/* { dg-additional-options "-fdump-tree-optimized" } */
 
 int
 foo (int integral, int decimal, int power_ten)
diff --git a/gcc/testsuite/gcc.dg/vect/pr56695.c b/gcc/testsuite/gcc.dg/vect/pr56695.c
index ee3d829..2fbe754 100644
--- a/gcc/testsuite/gcc.dg/vect/pr56695.c
+++ b/gcc/testsuite/gcc.dg/vect/pr56695.c
@@ -1,6 +1,6 @@ 
 /* PR tree-optimization/56695 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize" } */
+/* { dg-additional-options "-O2 -ftree-vectorize" } */
 
 int a, b, i;
 
diff --git a/gcc/testsuite/gcc.dg/vect/pr62171.c b/gcc/testsuite/gcc.dg/vect/pr62171.c
index 18517b3..bada4db 100644
--- a/gcc/testsuite/gcc.dg/vect/pr62171.c
+++ b/gcc/testsuite/gcc.dg/vect/pr62171.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */
+/* { dg-additional-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */
 /* { dg-require-effective-target vect_double } */
 
 struct omp_data_i
diff --git a/gcc/testsuite/gcc.dg/vect/pr63530.c b/gcc/testsuite/gcc.dg/vect/pr63530.c
index b583b9b..919b355 100644
--- a/gcc/testsuite/gcc.dg/vect/pr63530.c
+++ b/gcc/testsuite/gcc.dg/vect/pr63530.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-O2 -ftree-vectorize -funroll-loops --param \"max-completely-peeled-insns=400\"" } */
+/* { dg-additional-options "-O2 -ftree-vectorize -funroll-loops --param \"max-completely-peeled-insns=400\"" } */
 
 /* PR tree-optimization/63530 */
 /* On armv7 hardware, following options cause run time failure  */
diff --git a/gcc/testsuite/gcc.dg/vect/pr68339.c b/gcc/testsuite/gcc.dg/vect/pr68339.c
index ab0eede..28fa294 100644
--- a/gcc/testsuite/gcc.dg/vect/pr68339.c
+++ b/gcc/testsuite/gcc.dg/vect/pr68339.c
@@ -1,6 +1,6 @@ 
 /* PR middle-end/68339 */
 /* { dg-do compile } */
-/* { dg-options "--param ggc-min-heapsize=0 --param ggc-min-expand=0 -fopenmp-simd" } */
+/* { dg-additional-options "--param ggc-min-heapsize=0 --param ggc-min-expand=0 -fopenmp-simd" } */
 
 #pragma omp declare simd notinbranch
 int
diff --git a/gcc/testsuite/gcc.dg/vect/pr70021.c b/gcc/testsuite/gcc.dg/vect/pr70021.c
index b147fa1..988fc53 100644
--- a/gcc/testsuite/gcc.dg/vect/pr70021.c
+++ b/gcc/testsuite/gcc.dg/vect/pr70021.c
@@ -1,5 +1,4 @@ 
 /* PR target/70021 */
-/* { dg-do run } */
 
 #include "tree-vect.h"
 
diff --git a/gcc/testsuite/gcc.dg/vect/pr70138-1.c b/gcc/testsuite/gcc.dg/vect/pr70138-1.c
index bd4d006..e391e76 100644
--- a/gcc/testsuite/gcc.dg/vect/pr70138-1.c
+++ b/gcc/testsuite/gcc.dg/vect/pr70138-1.c
@@ -1,5 +1,3 @@ 
-/* { dg-do run } */
-
 #include "tree-vect.h"
 
 double u[33 * 33];
diff --git a/gcc/testsuite/gcc.dg/vect/pr70138-2.c b/gcc/testsuite/gcc.dg/vect/pr70138-2.c
index b1f9737..01c5dd8 100644
--- a/gcc/testsuite/gcc.dg/vect/pr70138-2.c
+++ b/gcc/testsuite/gcc.dg/vect/pr70138-2.c
@@ -1,5 +1,3 @@ 
-/* { dg-do run } */
-
 #include "tree-vect.h"
 
 double u[33];
diff --git a/gcc/testsuite/gcc.dg/vect/pr70354-1.c b/gcc/testsuite/gcc.dg/vect/pr70354-1.c
index 70de811..9d601dc 100644
--- a/gcc/testsuite/gcc.dg/vect/pr70354-1.c
+++ b/gcc/testsuite/gcc.dg/vect/pr70354-1.c
@@ -1,5 +1,4 @@ 
 /* PR tree-optimization/70354 */
-/* { dg-do run } */
 
 #ifndef main
 #include "tree-vect.h"
diff --git a/gcc/testsuite/gcc.dg/vect/pr70354-2.c b/gcc/testsuite/gcc.dg/vect/pr70354-2.c
index 356a115..160e1e0 100644
--- a/gcc/testsuite/gcc.dg/vect/pr70354-2.c
+++ b/gcc/testsuite/gcc.dg/vect/pr70354-2.c
@@ -1,5 +1,4 @@ 
 /* PR tree-optimization/70354 */
-/* { dg-do run } */
 
 #ifndef main
 #include "tree-vect.h"
diff --git a/gcc/testsuite/gcc.dg/vect/pr71259.c b/gcc/testsuite/gcc.dg/vect/pr71259.c
index eefa243..587a8e3 100644
--- a/gcc/testsuite/gcc.dg/vect/pr71259.c
+++ b/gcc/testsuite/gcc.dg/vect/pr71259.c
@@ -1,6 +1,5 @@ 
 /* PR tree-optimization/71259 */
-/* { dg-do run } */
-/* { dg-options "-O3" } */
+/* { dg-additional-options "-O3" } */
 /* { dg-additional-options "-mavx" { target avx_runtime } } */
 
 #include "tree-vect.h"
diff --git a/gcc/testsuite/gcc.dg/vect/vect-82_64.c b/gcc/testsuite/gcc.dg/vect/vect-82_64.c
index fc7434a..e5bb509 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-82_64.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-82_64.c
@@ -1,6 +1,6 @@ 
 /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */
 /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */
-/* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */
+/* { dg-additional-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */
 /* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */
 
 #include <stdarg.h>
diff --git a/gcc/testsuite/gcc.dg/vect/vect-83_64.c b/gcc/testsuite/gcc.dg/vect/vect-83_64.c
index 03f9f7b..39fd998 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-83_64.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-83_64.c
@@ -1,6 +1,6 @@ 
 /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */
 /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */
-/* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */
+/* { dg-additional-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */
 /* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */
 
 #include <stdarg.h>
diff --git a/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c b/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c
index a2d36d3..4429348 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c
@@ -1,6 +1,6 @@ 
 /* PR debug/41926 */
 /* { dg-do compile } */
-/* { dg-options "-O2 -g -ffast-math -funroll-loops -ftree-vectorize -msse2" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-additional-options "-O2 -g -ffast-math -funroll-loops -ftree-vectorize -msse2" { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */
 
 void
diff --git a/gcc/testsuite/gcc.dg/vect/vect-fold-1.c b/gcc/testsuite/gcc.dg/vect/vect-fold-1.c
index 2bd21a4..cc1349e 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-fold-1.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-fold-1.c
@@ -1,5 +1,5 @@ 
 /* { dg-do compile } */
-/* { dg-options "-O2 -fdump-tree-ccp1" } */
+/* { dg-additional-options "-O2 -fdump-tree-ccp1" } */
 
 typedef unsigned char v4qi __attribute__ ((vector_size (4)));
 
diff --git a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-1.c b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-1.c
index 456866d..ec36915 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-1.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-1.c
@@ -1,4 +1,3 @@ 
-/* { dg-do run } */
 /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-additional-options "-msse2 -fdump-tree-cunroll-details" { target { i?86-*-* x86_64-*-* } } } */
 
diff --git a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-2.c b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-2.c
index cf1c1ef..bfc7c3b 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-2.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-2.c
@@ -1,4 +1,3 @@ 
-/* { dg-do run } */
 /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-additional-options "-msse2 -fdump-tree-cunroll-details" { target { i?86-*-* x86_64-*-* } } } */
 
diff --git a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-3.c b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-3.c
index d8fe307..8bb3a0b 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-3.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-3.c
@@ -1,4 +1,3 @@ 
-/* { dg-do run } */
 /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-additional-options "-msse2 -fdump-tree-cunroll-details" { target { i?86-*-* x86_64-*-* } } } */
 
diff --git a/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c b/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c
index 85ff0e0..682b319 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-Wno-shift-overflow" } */
+/* { dg-additional-options "-Wno-shift-overflow" } */
 /* { dg-require-effective-target vect_shift } */
 /* { dg-require-effective-target vect_int } */
 /* Check the standard integer types for left and right shifts to see if the
diff --git a/gcc/testsuite/gcc.dg/vect/vect-shift-2.c b/gcc/testsuite/gcc.dg/vect/vect-shift-2.c
index 6199cd6..ba8e7c1 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-shift-2.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-shift-2.c
@@ -1,4 +1,4 @@ 
-/* { dg-options "-Wno-shift-overflow" } */
+/* { dg-additional-options "-Wno-shift-overflow" } */
 /* { dg-require-effective-target vect_shift } */
 /* { dg-require-effective-target vect_int } */
 /* Check the standard integer types for left and right shifts to see if the
diff --git a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c
index 6c2ff49..bd243f8 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c
@@ -1,7 +1,7 @@ 
 /* PR target/59843 ICE on function taking/returning vector of one float64_t.  */
 
 /* { dg-do compile } */
-/* { dg-options "-Warray-bounds -O2 -fno-inline -std=c99" } */
+/* { dg-additional-options "-Warray-bounds -O2 -fno-inline -std=c99" } */
 
 #define TEST(BASETYPE, VECTYPE, SUFFIX)					     \
   typedef BASETYPE VECTYPE						     \