Patchwork target-arm: Handle 'smc' as an undefined instruction

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Submitter Adam Lackorzynski
Date Sept. 2, 2010, 9:40 p.m.
Message ID <20100902214050.GD23301@os.inf.tu-dresden.de>
Download mbox | patch
Permalink /patch/63559/
State New
Headers show

Comments

Adam Lackorzynski - Sept. 2, 2010, 9:40 p.m.
Handle smc as an undefined instruction instead of having it wrongly
interpreted as some other one.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
 target-arm/translate.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)
Peter Maydell - Sept. 2, 2010, 10:14 p.m.
On Thu, Sep 02, 2010 at 11:40:50PM +0200, Adam Lackorzynski wrote:
> +        case 7:
> +            /* SMC? */
> +            if ((insn & 0xfffffff0) == 0xe1600070) {
> +                goto illegal_op;
> +            }
> +            /* bkpt */

This doesn't look right to me. SMC in the ARM encoding is a standard
conditionalised instruction, so you shouldn't be mandating that the
cond field is 0xe.

I think the correct way to distinguish BKPT from SMC is to look at
bits [22..21] of the instruction: 01 for BKPT, 11 for SMC and
other combinations are UNDEFINED. This is in 'op1' at this point
in the code...

-- Peter Maydell

Patch

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 6fcdd7e..c1d55ed 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6346,7 +6346,12 @@  static void disas_arm_insn(CPUState * env, DisasContext *s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            /* SMC? */
+            if ((insn & 0xfffffff0) == 0xe1600070) {
+                goto illegal_op;
+            }
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);