diff mbox

[PATCH/AARCH64] Add vulcan -mcpu support

Message ID CANx+fTD3Oh84pfJeDOBFkDo8j7eKA1t17VYo-ARtFGsB0512zg@mail.gmail.com
State New
Headers show

Commit Message

Virendra Pathak June 9, 2016, 10:11 a.m. UTC
Hi,

Kindly find the Broadcom's Vulcan -mcpu patch (attached) after fixing
the alphabetical order for listing the processor name.
The patch is based on gcc-6-branch.

gcc/ChangeLog:

Virendra Pathak  <virendra.pathak@broadcom.com>

        * config/aarch64/aarch64-cores.def (vulcan): New core.
        * config/aarch64/aarch64-tune.md: Regenerate.
        * doc/invoke.texi (AARCH64/mtune): Document vulcan as an
        available option.



Thanks.
with regards,
Virendra Pathak


On Wed, Jun 8, 2016 at 11:15 AM, Virendra Pathak
<virendra.pathak@broadcom.com> wrote:
> Please find gcc ChangeLog in the correct format.
>
> ChangeLog:
>
> Virendra Pathak  <virendra.pathak@broadcom.com>
>         * config/aarch64/aarch64-cores.def (vulcan): New core
>         * config/aarch64/aarch64-tune.md: Regenerate
>         * doc/invoke.texi (AARCH64/mtune): Document vulcan as an
> available option.
>
> Thanks.
>
> with regards,
> Virendra Pathak
>
>
> On Wed, Jun 8, 2016 at 10:52 AM, Virendra Pathak
> <virendra.pathak@broadcom.com> wrote:
>> Hi gcc-patches group,
>>
>> ping,
>>
>> updated the ChangeLog with author's entry.
>>
>> ChangeLog:
>> Virendra Pathak (virendra.pathak@broadcom.com)
>> * config/aarch64/aarch64-cores.def (vulcan): New core
>> * config/aarch64/aarch64-tune.md: Regenerate
>> * doc/invoke.texi (AARCH64/mtune): Document vulcan as an available option.
>>
>> Thanks.
>>
>> with regards,
>> Virendra Pathak
>>
>>
>> On Sat, Jun 4, 2016 at 12:05 PM, Virendra Pathak
>> <virendra.pathak@broadcom.com> wrote:
>>> Hi gcc-patches group,
>>>
>>> Please find the basic patch for adding -mcpu=vulcan support in the gcc.
>>> Broadcom's vulcan is an armv8-a aarch64 based server processor.
>>>
>>> At present we are using schedule model of cortex-a57 but soon we will
>>> be submitting a schedule model for vulcan.
>>>
>>> Please review the patch (attached with this mail) and kindly merge it
>>> in the gcc-6-branch.
>>>
>>> Tested the patch with aarch64-linux-gnu cross build,
>>> aarch64-unknown-linux-gnu native build and make check.
>>> We have also obtained company wide agreement with FSF for contributing
>>> to gcc project.
>>>
>>> Thanks.
>>>
>>>
>>> ChangeLog:
>>> * config/aarch64/aarch64-cores.def (vulcan): New core
>>> * config/aarch64/aarch64-tune.md: Regenerate
>>> * doc/invoke.texi (AARCH64/mtune): Document vulcan as an available option.
>>>
>>>
>>>
>>> with regards,
>>> Virendra Pathak
From 9c9afba1c6a6381483bfe4b38da58b9efc890de2 Mon Sep 17 00:00:00 2001
From: Virendra Pathak <virendra.pathak@broadcom.com>
Date: Wed, 1 Jun 2016 03:15:33 -0700
Subject: [PATCH] [AArch64] Add -mcpu vulcan support

---
 gcc/config/aarch64/aarch64-cores.def | 1 +
 gcc/config/aarch64/aarch64-tune.md   | 2 +-
 gcc/doc/invoke.texi                  | 2 +-
 3 files changed, 3 insertions(+), 2 deletions(-)

Comments

Virendra Pathak June 14, 2016, 11:35 a.m. UTC | #1
Hi,

Since, as per the development policy, all the new features should go to trunk;
I will rebase this patch on the trunk and will re-propose.

Apology for causing any inconvenience.

Thanks.


with regards,
Virendra Pathak
with regards,
Virendra Pathak


On Thu, Jun 9, 2016 at 3:41 PM, Virendra Pathak
<virendra.pathak@broadcom.com> wrote:
> Hi,
>
> Kindly find the Broadcom's Vulcan -mcpu patch (attached) after fixing
> the alphabetical order for listing the processor name.
> The patch is based on gcc-6-branch.
>
> gcc/ChangeLog:
>
> Virendra Pathak  <virendra.pathak@broadcom.com>
>
>         * config/aarch64/aarch64-cores.def (vulcan): New core.
>         * config/aarch64/aarch64-tune.md: Regenerate.
>         * doc/invoke.texi (AARCH64/mtune): Document vulcan as an
>         available option.
>
>
>
> Thanks.
> with regards,
> Virendra Pathak
>
>
> On Wed, Jun 8, 2016 at 11:15 AM, Virendra Pathak
> <virendra.pathak@broadcom.com> wrote:
>> Please find gcc ChangeLog in the correct format.
>>
>> ChangeLog:
>>
>> Virendra Pathak  <virendra.pathak@broadcom.com>
>>         * config/aarch64/aarch64-cores.def (vulcan): New core
>>         * config/aarch64/aarch64-tune.md: Regenerate
>>         * doc/invoke.texi (AARCH64/mtune): Document vulcan as an
>> available option.
>>
>> Thanks.
>>
>> with regards,
>> Virendra Pathak
>>
>>
>> On Wed, Jun 8, 2016 at 10:52 AM, Virendra Pathak
>> <virendra.pathak@broadcom.com> wrote:
>>> Hi gcc-patches group,
>>>
>>> ping,
>>>
>>> updated the ChangeLog with author's entry.
>>>
>>> ChangeLog:
>>> Virendra Pathak (virendra.pathak@broadcom.com)
>>> * config/aarch64/aarch64-cores.def (vulcan): New core
>>> * config/aarch64/aarch64-tune.md: Regenerate
>>> * doc/invoke.texi (AARCH64/mtune): Document vulcan as an available option.
>>>
>>> Thanks.
>>>
>>> with regards,
>>> Virendra Pathak
>>>
>>>
>>> On Sat, Jun 4, 2016 at 12:05 PM, Virendra Pathak
>>> <virendra.pathak@broadcom.com> wrote:
>>>> Hi gcc-patches group,
>>>>
>>>> Please find the basic patch for adding -mcpu=vulcan support in the gcc.
>>>> Broadcom's vulcan is an armv8-a aarch64 based server processor.
>>>>
>>>> At present we are using schedule model of cortex-a57 but soon we will
>>>> be submitting a schedule model for vulcan.
>>>>
>>>> Please review the patch (attached with this mail) and kindly merge it
>>>> in the gcc-6-branch.
>>>>
>>>> Tested the patch with aarch64-linux-gnu cross build,
>>>> aarch64-unknown-linux-gnu native build and make check.
>>>> We have also obtained company wide agreement with FSF for contributing
>>>> to gcc project.
>>>>
>>>> Thanks.
>>>>
>>>>
>>>> ChangeLog:
>>>> * config/aarch64/aarch64-cores.def (vulcan): New core
>>>> * config/aarch64/aarch64-tune.md: Regenerate
>>>> * doc/invoke.texi (AARCH64/mtune): Document vulcan as an available option.
>>>>
>>>>
>>>>
>>>> with regards,
>>>> Virendra Pathak
diff mbox

Patch

diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 251a3eb..33c7521 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -47,6 +47,7 @@  AARCH64_CORE("cortex-a72",  cortexa72, cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AA
 AARCH64_CORE("exynos-m1",   exynosm1,  exynosm1,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1,  "0x53", "0x001")
 AARCH64_CORE("qdf24xx",     qdf24xx,   cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57, "0x51", "0x800")
 AARCH64_CORE("thunderx",    thunderx,  thunderx,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx,  "0x43", "0x0a1")
+AARCH64_CORE("vulcan",      vulcan,    cortexa57, 8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57, "0x42", "0x516")
 AARCH64_CORE("xgene1",      xgene1,    xgene1,    8A,  AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000")
 
 /* V8 big.LITTLE implementations.  */
diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md
index cbc6f48..46911a3 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@ 
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-	"cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
+	"cortexa35,cortexa53,cortexa57,cortexa72,exynosm1,qdf24xx,thunderx,vulcan,xgene1,cortexa57cortexa53,cortexa72cortexa53"
 	(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 821f8fd..67518cf 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12956,7 +12956,7 @@  Specify the name of the target processor for which GCC should tune the
 performance of the code.  Permissible values for this option are:
 @samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57},
 @samp{cortex-a72}, @samp{exynos-m1}, @samp{qdf24xx}, @samp{thunderx},
-@samp{xgene1}.
+@samp{vulcan}, @samp{xgene1}.
 
 Additionally, this option can specify that GCC should tune the performance
 of the code for a big.LITTLE system.  Permissible values for this