| Message ID | CAKdteOba1Z3GPi7x2uPEOs7j1WoVV6MsL+ntC7Ttcob5PrF4Xg@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
On Wed, Jun 08, 2016 at 04:44:00PM +0200, Christophe Lyon wrote: > I've tried the attached patch (which does only dg-options -> > dg-additional-options). > For GCC, it's better, except that on arm-none-eabi qemu complains about > an illegal instruction when asked to use arm926 and GCC is configured with > the default cpu. Maybe that's because check_vect does not have the expected check_vect installs a SIGILL handler and if the insn is invalid, excepts a signal to be raised. Is that not the case with qemu? Or is qemu just being too noisy? > <DATE> Christophe Lyon <christophe.lyon@linaro.org> > > * gcc.dg/vect/YYY.c: Use dg-additional options instead of dg-options. Please list all the changed tests in the ChangeLog (with : Likewise. for all but the first one). Ok with that change. Jakub
On 8 June 2016 at 16:50, Jakub Jelinek <jakub@redhat.com> wrote: > On Wed, Jun 08, 2016 at 04:44:00PM +0200, Christophe Lyon wrote: >> I've tried the attached patch (which does only dg-options -> >> dg-additional-options). >> For GCC, it's better, except that on arm-none-eabi qemu complains about >> an illegal instruction when asked to use arm926 and GCC is configured with >> the default cpu. Maybe that's because check_vect does not have the expected > > check_vect installs a SIGILL handler and if the insn is invalid, excepts > a signal to be raised. Is that not the case with qemu? Or is qemu just > being too noisy? > qemu complains when executing check_vect's prologue, which contains movw r1, #35712 which is not supported either on arm926. I don't know if the signal is not raised or if qemu hides it (I'm using qemu user mode) >> <DATE> Christophe Lyon <christophe.lyon@linaro.org> >> >> * gcc.dg/vect/YYY.c: Use dg-additional options instead of dg-options. > > Please list all the changed tests in the ChangeLog (with : Likewise. for > all but the first one). > Yes, that's what I meant. > Ok with that change. > > Jakub
On Thu, Jun 09, 2016 at 02:18:44PM +0200, Christophe Lyon wrote: > On 8 June 2016 at 16:50, Jakub Jelinek <jakub@redhat.com> wrote: > > On Wed, Jun 08, 2016 at 04:44:00PM +0200, Christophe Lyon wrote: > >> I've tried the attached patch (which does only dg-options -> > >> dg-additional-options). > >> For GCC, it's better, except that on arm-none-eabi qemu complains about > >> an illegal instruction when asked to use arm926 and GCC is configured with > >> the default cpu. Maybe that's because check_vect does not have the expected > > > > check_vect installs a SIGILL handler and if the insn is invalid, excepts > > a signal to be raised. Is that not the case with qemu? Or is qemu just > > being too noisy? > > > qemu complains when executing check_vect's prologue, which contains > movw r1, #35712 > which is not supported either on arm926. Bet it depends if this happens before the signal(SIGILL, sig_ill_handler); call or after it. If before, then I guess you'd better rewrite the long long a = 0, b = 1; asm ("vorr %P0, %P1, %P2" : "=w" (a) : "0" (a), "w" (b)); if (a != 1) fully into inline asm, if after, then it is likely either just too noisy qemu, or misdesigned issue in qemu. Jakub
On 9 June 2016 at 14:31, Jakub Jelinek <jakub@redhat.com> wrote: > On Thu, Jun 09, 2016 at 02:18:44PM +0200, Christophe Lyon wrote: >> On 8 June 2016 at 16:50, Jakub Jelinek <jakub@redhat.com> wrote: >> > On Wed, Jun 08, 2016 at 04:44:00PM +0200, Christophe Lyon wrote: >> >> I've tried the attached patch (which does only dg-options -> >> >> dg-additional-options). >> >> For GCC, it's better, except that on arm-none-eabi qemu complains about >> >> an illegal instruction when asked to use arm926 and GCC is configured with >> >> the default cpu. Maybe that's because check_vect does not have the expected >> > >> > check_vect installs a SIGILL handler and if the insn is invalid, excepts >> > a signal to be raised. Is that not the case with qemu? Or is qemu just >> > being too noisy? >> > >> qemu complains when executing check_vect's prologue, which contains >> movw r1, #35712 >> which is not supported either on arm926. > > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler); > call or after it. If before, then I guess you'd better rewrite the > long long a = 0, b = 1; > asm ("vorr %P0, %P1, %P2" > : "=w" (a) > : "0" (a), "w" (b)); > if (a != 1) Of course you are right: it happens just before the call to signal, to build the sig_ill_handler address in r1. So it's not even a problem with rewriting the asm. > fully into inline asm, if after, then it is likely either just too noisy > qemu, or misdesigned issue in qemu. > > Jakub
On Thu, Jun 09, 2016 at 02:40:43PM +0200, Christophe Lyon wrote: > > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler); > > call or after it. If before, then I guess you'd better rewrite the > > long long a = 0, b = 1; > > asm ("vorr %P0, %P1, %P2" > > : "=w" (a) > > : "0" (a), "w" (b)); > > if (a != 1) > > Of course you are right: it happens just before the call to signal, > to build the sig_ill_handler address in r1. > > So it's not even a problem with rewriting the asm. Ugh, so the added options don't affect just vectorized code, but normal integer only code? check_vect is fragile, there is always a risk that some instruction is scheduled before the call. If you have working target attribute support, I think you should compile check_vect with attribute set to some lowest common denominator that every ARM CPU supports (if there is any, that is). Though most likely you'll need to tweak the inline asm, because maybe "w" constraint won't be available then. Jakub
diff --git a/gcc/testsuite/g++.dg/vect/pr33834_2.cc b/gcc/testsuite/g++.dg/vect/pr33834_2.cc index ecaf588..49e72d2 100644 --- a/gcc/testsuite/g++.dg/vect/pr33834_2.cc +++ b/gcc/testsuite/g++.dg/vect/pr33834_2.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize" } */ +/* { dg-additional-options "-O3 -ftree-vectorize" } */ /* Testcase by Martin Michlmayr <tbm@cyrius.com> */ diff --git a/gcc/testsuite/g++.dg/vect/pr33860a.cc b/gcc/testsuite/g++.dg/vect/pr33860a.cc index 0e5164f..bbfdeef 100644 --- a/gcc/testsuite/g++.dg/vect/pr33860a.cc +++ b/gcc/testsuite/g++.dg/vect/pr33860a.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ +/* { dg-additional-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* Testcase by Martin Michlmayr <tbm@cyrius.com> */ diff --git a/gcc/testsuite/g++.dg/vect/pr45470-a.cc b/gcc/testsuite/g++.dg/vect/pr45470-a.cc index 98ce4ca..ba5873c 100644 --- a/gcc/testsuite/g++.dg/vect/pr45470-a.cc +++ b/gcc/testsuite/g++.dg/vect/pr45470-a.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize -fnon-call-exceptions" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fnon-call-exceptions" } */ struct A { diff --git a/gcc/testsuite/g++.dg/vect/pr45470-b.cc b/gcc/testsuite/g++.dg/vect/pr45470-b.cc index 3ad66ec..ce04f8e 100644 --- a/gcc/testsuite/g++.dg/vect/pr45470-b.cc +++ b/gcc/testsuite/g++.dg/vect/pr45470-b.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize -fno-vect-cost-model -fnon-call-exceptions" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fno-vect-cost-model -fnon-call-exceptions" } */ template < typename _Tp > struct new_allocator { diff --git a/gcc/testsuite/g++.dg/vect/pr60896.cc b/gcc/testsuite/g++.dg/vect/pr60896.cc index c6ce68b..b4ff0d3 100644 --- a/gcc/testsuite/g++.dg/vect/pr60896.cc +++ b/gcc/testsuite/g++.dg/vect/pr60896.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3" } */ +/* { dg-additional-options "-O3" } */ struct A { diff --git a/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c b/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c index 54aa89b..00055b8 100644 --- a/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c +++ b/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c @@ -1,6 +1,6 @@ /* PR tree-optimization/45241 */ /* { dg-do compile } */ -/* { dg-options "-ftree-vectorize" } */ +/* { dg-additional-options "-ftree-vectorize" } */ int foo (short x) diff --git a/gcc/testsuite/gcc.dg/vect/pr18308.c b/gcc/testsuite/gcc.dg/vect/pr18308.c index b71f08e..51bcc83 100644 --- a/gcc/testsuite/gcc.dg/vect/pr18308.c +++ b/gcc/testsuite/gcc.dg/vect/pr18308.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -ftree-vectorize -funroll-loops" } */ +/* { dg-additional-options "-O -ftree-vectorize -funroll-loops" } */ void foo(); void bar(int j) diff --git a/gcc/testsuite/gcc.dg/vect/pr24049.c b/gcc/testsuite/gcc.dg/vect/pr24049.c index a7798bd..dd3e94c 100644 --- a/gcc/testsuite/gcc.dg/vect/pr24049.c +++ b/gcc/testsuite/gcc.dg/vect/pr24049.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize --param ggc-min-heapsize=0 --param ggc-min-expand=0" } */ +/* { dg-additional-options "-O1 -ftree-vectorize --param ggc-min-heapsize=0 --param ggc-min-expand=0" } */ void unscrunch (unsigned char *, int *); diff --git a/gcc/testsuite/gcc.dg/vect/pr33373.c b/gcc/testsuite/gcc.dg/vect/pr33373.c index efba2ab..7ab6223 100644 --- a/gcc/testsuite/gcc.dg/vect/pr33373.c +++ b/gcc/testsuite/gcc.dg/vect/pr33373.c @@ -1,4 +1,4 @@ -/* { dg-options "-Wno-shift-overflow" } */ +/* { dg-additional-options "-Wno-shift-overflow" } */ /* { dg-do compile } */ void DOSMEM_FillIsrTable(int*isr) { int i; diff --git a/gcc/testsuite/gcc.dg/vect/pr36228.c b/gcc/testsuite/gcc.dg/vect/pr36228.c index 5f17739..710cf95 100644 --- a/gcc/testsuite/gcc.dg/vect/pr36228.c +++ b/gcc/testsuite/gcc.dg/vect/pr36228.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -fdump-tree-vect-details" } */ +/* { dg-additional-options "-O3 -fdump-tree-vect-details" } */ #define COLS 8 #define ROWS 8 diff --git a/gcc/testsuite/gcc.dg/vect/pr42395.c b/gcc/testsuite/gcc.dg/vect/pr42395.c index 7d0b832..540473b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr42395.c +++ b/gcc/testsuite/gcc.dg/vect/pr42395.c @@ -1,6 +1,6 @@ /* PR debug/42395 */ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize -g" } */ +/* { dg-additional-options "-O3 -ftree-vectorize -g" } */ void foo(int j, int *A) { diff --git a/gcc/testsuite/gcc.dg/vect/pr42604.c b/gcc/testsuite/gcc.dg/vect/pr42604.c index 4e05c23..1619f24 100644 --- a/gcc/testsuite/gcc.dg/vect/pr42604.c +++ b/gcc/testsuite/gcc.dg/vect/pr42604.c @@ -1,6 +1,6 @@ /* PR debug/42604 */ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize -g -ffast-math" } */ +/* { dg-additional-options "-O3 -ftree-vectorize -g -ffast-math" } */ unsigned *d; unsigned short e; diff --git a/gcc/testsuite/gcc.dg/vect/pr46663.c b/gcc/testsuite/gcc.dg/vect/pr46663.c index 15f15a5..b42e114 100644 --- a/gcc/testsuite/gcc.dg/vect/pr46663.c +++ b/gcc/testsuite/gcc.dg/vect/pr46663.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -ftree-vectorize -fdump-tree-vect-details -fexceptions" } */ +/* { dg-additional-options "-O -ftree-vectorize -fdump-tree-vect-details -fexceptions" } */ typedef __attribute__ ((const)) int (*bart) (void); diff --git a/gcc/testsuite/gcc.dg/vect/pr48765.c b/gcc/testsuite/gcc.dg/vect/pr48765.c index 978dc25..ae36437 100644 --- a/gcc/testsuite/gcc.dg/vect/pr48765.c +++ b/gcc/testsuite/gcc.dg/vect/pr48765.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ -/* { dg-options "-O3 -mcpu=power6" } */ +/* { dg-additional-options "-O3 -mcpu=power6" } */ enum reg_class { diff --git a/gcc/testsuite/gcc.dg/vect/pr49093.c b/gcc/testsuite/gcc.dg/vect/pr49093.c index 5a29506..9b3b7f4 100644 --- a/gcc/testsuite/gcc.dg/vect/pr49093.c +++ b/gcc/testsuite/gcc.dg/vect/pr49093.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize -fdump-tree-vect-details -fno-tree-fre" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fdump-tree-vect-details -fno-tree-fre" } */ volatile unsigned char g_324[4] = {0, 1, 0, 1}; void foo (int); diff --git a/gcc/testsuite/gcc.dg/vect/pr49352.c b/gcc/testsuite/gcc.dg/vect/pr49352.c index d8e0bae..0d3fc9c 100644 --- a/gcc/testsuite/gcc.dg/vect/pr49352.c +++ b/gcc/testsuite/gcc.dg/vect/pr49352.c @@ -1,6 +1,6 @@ /* PR tree-optimization/49352 */ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fcompare-debug" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -fcompare-debug" } */ /* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ int diff --git a/gcc/testsuite/gcc.dg/vect/pr52298.c b/gcc/testsuite/gcc.dg/vect/pr52298.c index 453d7c8..4aa5c0d 100644 --- a/gcc/testsuite/gcc.dg/vect/pr52298.c +++ b/gcc/testsuite/gcc.dg/vect/pr52298.c @@ -1,4 +1,4 @@ -/* { dg-options "-O1 -ftree-vectorize -fno-tree-pre -fno-tree-loop-im" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fno-tree-pre -fno-tree-loop-im" } */ extern void abort (void); int c[80]; diff --git a/gcc/testsuite/gcc.dg/vect/pr52870.c b/gcc/testsuite/gcc.dg/vect/pr52870.c index 7b185ee..b89856a 100644 --- a/gcc/testsuite/gcc.dg/vect/pr52870.c +++ b/gcc/testsuite/gcc.dg/vect/pr52870.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize" } */ +/* { dg-additional-options "-O1 -ftree-vectorize" } */ void foo (unsigned long int); diff --git a/gcc/testsuite/gcc.dg/vect/pr53185.c b/gcc/testsuite/gcc.dg/vect/pr53185.c index af1efba..adf208b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr53185.c +++ b/gcc/testsuite/gcc.dg/vect/pr53185.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize" } */ +/* { dg-additional-options "-O3 -ftree-vectorize" } */ unsigned short a, e; int *b, *d; int c; diff --git a/gcc/testsuite/gcc.dg/vect/pr53773.c b/gcc/testsuite/gcc.dg/vect/pr53773.c index 2be76d7..1bee98b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr53773.c +++ b/gcc/testsuite/gcc.dg/vect/pr53773.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-fdump-tree-optimized" } */ +/* { dg-additional-options "-fdump-tree-optimized" } */ int foo (int integral, int decimal, int power_ten) diff --git a/gcc/testsuite/gcc.dg/vect/pr56695.c b/gcc/testsuite/gcc.dg/vect/pr56695.c index ee3d829..2fbe754 100644 --- a/gcc/testsuite/gcc.dg/vect/pr56695.c +++ b/gcc/testsuite/gcc.dg/vect/pr56695.c @@ -1,6 +1,6 @@ /* PR tree-optimization/56695 */ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize" } */ +/* { dg-additional-options "-O2 -ftree-vectorize" } */ int a, b, i; diff --git a/gcc/testsuite/gcc.dg/vect/pr62171.c b/gcc/testsuite/gcc.dg/vect/pr62171.c index 18517b3..bada4db 100644 --- a/gcc/testsuite/gcc.dg/vect/pr62171.c +++ b/gcc/testsuite/gcc.dg/vect/pr62171.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ /* { dg-require-effective-target vect_double } */ struct omp_data_i diff --git a/gcc/testsuite/gcc.dg/vect/pr63530.c b/gcc/testsuite/gcc.dg/vect/pr63530.c index b583b9b..919b355 100644 --- a/gcc/testsuite/gcc.dg/vect/pr63530.c +++ b/gcc/testsuite/gcc.dg/vect/pr63530.c @@ -1,4 +1,4 @@ -/* { dg-options "-O2 -ftree-vectorize -funroll-loops --param \"max-completely-peeled-insns=400\"" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -funroll-loops --param \"max-completely-peeled-insns=400\"" } */ /* PR tree-optimization/63530 */ /* On armv7 hardware, following options cause run time failure */ diff --git a/gcc/testsuite/gcc.dg/vect/pr68339.c b/gcc/testsuite/gcc.dg/vect/pr68339.c index ab0eede..28fa294 100644 --- a/gcc/testsuite/gcc.dg/vect/pr68339.c +++ b/gcc/testsuite/gcc.dg/vect/pr68339.c @@ -1,6 +1,6 @@ /* PR middle-end/68339 */ /* { dg-do compile } */ -/* { dg-options "--param ggc-min-heapsize=0 --param ggc-min-expand=0 -fopenmp-simd" } */ +/* { dg-additional-options "--param ggc-min-heapsize=0 --param ggc-min-expand=0 -fopenmp-simd" } */ #pragma omp declare simd notinbranch int diff --git a/gcc/testsuite/gcc.dg/vect/pr71259.c b/gcc/testsuite/gcc.dg/vect/pr71259.c index eefa243..89aacd9 100644 --- a/gcc/testsuite/gcc.dg/vect/pr71259.c +++ b/gcc/testsuite/gcc.dg/vect/pr71259.c @@ -1,6 +1,6 @@ /* PR tree-optimization/71259 */ /* { dg-do run } */ -/* { dg-options "-O3" } */ +/* { dg-additional-options "-O3" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/vect-82_64.c b/gcc/testsuite/gcc.dg/vect/vect-82_64.c index fc7434a..e5bb509 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-82_64.c +++ b/gcc/testsuite/gcc.dg/vect/vect-82_64.c @@ -1,6 +1,6 @@ /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */ /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */ -/* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ /* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ #include <stdarg.h> diff --git a/gcc/testsuite/gcc.dg/vect/vect-83_64.c b/gcc/testsuite/gcc.dg/vect/vect-83_64.c index 03f9f7b..39fd998 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-83_64.c +++ b/gcc/testsuite/gcc.dg/vect/vect-83_64.c @@ -1,6 +1,6 @@ /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */ /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */ -/* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ /* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ #include <stdarg.h> diff --git a/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c b/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c index a2d36d3..4429348 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c +++ b/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c @@ -1,6 +1,6 @@ /* PR debug/41926 */ /* { dg-do compile } */ -/* { dg-options "-O2 -g -ffast-math -funroll-loops -ftree-vectorize -msse2" { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-additional-options "-O2 -g -ffast-math -funroll-loops -ftree-vectorize -msse2" { target { i?86-*-* x86_64-*-* } } } */ /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */ void diff --git a/gcc/testsuite/gcc.dg/vect/vect-fold-1.c b/gcc/testsuite/gcc.dg/vect/vect-fold-1.c index 2bd21a4..cc1349e 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-fold-1.c +++ b/gcc/testsuite/gcc.dg/vect/vect-fold-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-ccp1" } */ +/* { dg-additional-options "-O2 -fdump-tree-ccp1" } */ typedef unsigned char v4qi __attribute__ ((vector_size (4))); diff --git a/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c b/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c index 85ff0e0..682b319 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c +++ b/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c @@ -1,4 +1,4 @@ -/* { dg-options "-Wno-shift-overflow" } */ +/* { dg-additional-options "-Wno-shift-overflow" } */ /* { dg-require-effective-target vect_shift } */ /* { dg-require-effective-target vect_int } */ /* Check the standard integer types for left and right shifts to see if the diff --git a/gcc/testsuite/gcc.dg/vect/vect-shift-2.c b/gcc/testsuite/gcc.dg/vect/vect-shift-2.c index 6199cd6..ba8e7c1 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-shift-2.c +++ b/gcc/testsuite/gcc.dg/vect/vect-shift-2.c @@ -1,4 +1,4 @@ -/* { dg-options "-Wno-shift-overflow" } */ +/* { dg-additional-options "-Wno-shift-overflow" } */ /* { dg-require-effective-target vect_shift } */ /* { dg-require-effective-target vect_int } */ /* Check the standard integer types for left and right shifts to see if the diff --git a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c index 6c2ff49..bd243f8 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c +++ b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c @@ -1,7 +1,7 @@ /* PR target/59843 ICE on function taking/returning vector of one float64_t. */ /* { dg-do compile } */ -/* { dg-options "-Warray-bounds -O2 -fno-inline -std=c99" } */ +/* { dg-additional-options "-Warray-bounds -O2 -fno-inline -std=c99" } */ #define TEST(BASETYPE, VECTYPE, SUFFIX) \ typedef BASETYPE VECTYPE \