@@ -15,6 +15,7 @@ obj-y += cache.o
obj-y += tlb.o
obj-y += transition.o
obj-y += fwcall.o
+obj-$(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o
obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/
new file mode 100644
@@ -0,0 +1,25 @@
+/*
+ * Copyright 2016 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/armv8/sec_firmware.h>
+
+__weak int sec_firmware_init(void)
+{
+ return -1;
+}
+
+__weak bool sec_firmware_is_valid(void)
+{
+ return false;
+}
+
+#if defined(CONFIG_ARMV8_PSCI)
+__weak unsigned int sec_firmware_support_psci_version(void)
+{
+ return 0;
+}
+#endif
new file mode 100644
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2016 NXP Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __SEC_FIRMWARE_H_
+#define __SEC_FIRMWARE_H_
+
+int sec_firmware_init(void);
+bool sec_firmware_is_valid(void);
+#ifdef CONFIG_ARMV8_PSCI
+unsigned int sec_firmware_support_psci_version(void);
+#endif
+
+#endif /* __SEC_FIRMWARE_H_ */