diff mbox

[U-Boot,2/3] armv8/fsl-layerscape: add dwc3 gadget driver support

Message ID 1464694370-15853-3-git-send-email-rajat.srivastava@nxp.com
State Superseded
Headers show

Commit Message

Rajat Srivastava May 31, 2016, 11:32 a.m. UTC
From: Rajesh Bhagat <rajesh.bhagat@nxp.com>

Implements the dwc3 gadget driver support for LS1043
platform, and performs below operations:
1. Enables snooping support for DWC3 controller.
2. Enables cache coherency in LS1043 platform.

Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c            | 87 +++++++++++++++++++++-
 .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  6 ++
 .../include/asm/arch-fsl-layerscape/sys_proto.h    | 11 +++
 drivers/usb/dwc3/core.c                            | 12 +++
 4 files changed, 114 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h

Comments

Marek Vasut May 31, 2016, 12:04 p.m. UTC | #1
On 05/31/2016 01:32 PM, Rajat Srivastava wrote:
> From: Rajesh Bhagat <rajesh.bhagat@nxp.com>
> 
> Implements the dwc3 gadget driver support for LS1043
> platform, and performs below operations:
> 1. Enables snooping support for DWC3 controller.
> 2. Enables cache coherency in LS1043 platform.
> 
> Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c            | 87 +++++++++++++++++++++-
>  .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  6 ++
>  .../include/asm/arch-fsl-layerscape/sys_proto.h    | 11 +++
>  drivers/usb/dwc3/core.c                            | 12 +++
>  4 files changed, 114 insertions(+), 2 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c

Don't mix platform code with driver code, split this patch.

> index 0fb5c7f..84b973d 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -17,6 +17,10 @@
>  #ifdef CONFIG_CHAIN_OF_TRUST
>  #include <fsl_validate.h>
>  #endif
> +#include <usb.h>
> +#include <dwc3-uboot.h>
> +#include <linux/usb/xhci-fsl.h>
> +
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -318,9 +322,12 @@ void fsl_lsch2_early_init_f(void)
>  #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
>  	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
>  #endif
> -	/* Make SEC reads and writes snoopable */
> +	/* Make SEC and USB reads and writes snoopable */
>  	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
> -		     SCFG_SNPCNFGCR_SECWRSNP);
> +		     SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_USB1RDSNP |
> +		     SCFG_SNPCNFGCR_USB1WRSNP | SCFG_SNPCNFGCR_USB2RDSNP |
> +		     SCFG_SNPCNFGCR_USB2WRSNP | SCFG_SNPCNFGCR_USB3RDSNP |
> +		     SCFG_SNPCNFGCR_USB3WRSNP);
>  
>  	/*
>  	 * Enable snoop requests and DVM message requests for
> @@ -336,6 +343,82 @@ void fsl_lsch2_early_init_f(void)
>  }
>  #endif
>  
> +#ifdef CONFIG_USB_DWC3
> +
> +#if defined(CONFIG_LS1043A)
> +static struct dwc3_device dwc3_device_data0 = {
> +	.maximum_speed = USB_SPEED_HIGH,
> +	.base = CONFIG_SYS_FSL_XHCI_USB1_ADDR,
> +	.dr_mode = USB_DR_MODE_PERIPHERAL,
> +	.index = 0,
> +};
> +
> +static struct dwc3_device dwc3_device_data1 = {
> +	.maximum_speed = USB_SPEED_HIGH,
> +	.base = CONFIG_SYS_FSL_XHCI_USB2_ADDR,
> +	.dr_mode = USB_DR_MODE_PERIPHERAL,
> +	.index = 1,
> +};
> +
> +static struct dwc3_device dwc3_device_data2 = {
> +	.maximum_speed = USB_SPEED_HIGH,
> +	.base = CONFIG_SYS_FSL_XHCI_USB3_ADDR,
> +	.dr_mode = USB_DR_MODE_PERIPHERAL,
> +	.index = 2,
> +};
> +
> +int usb_gadget_handle_interrupts(int index)
> +{
> +	dwc3_uboot_handle_interrupt(index);
> +	return 0;
> +}
> +#endif
> +
> +int board_usb_init(int index, enum usb_init_type init)
> +{
> +	switch (init) {
> +	case USB_INIT_DEVICE:
> +		switch (index) {
> +#if defined(CONFIG_LS1043A)
> +		case 0:
> +			dwc3_uboot_init(&dwc3_device_data0);
> +			break;
> +
> +		case 1:
> +			dwc3_uboot_init(&dwc3_device_data1);
> +			break;
> +		case 2:
> +			dwc3_uboot_init(&dwc3_device_data2);
> +			break;
> +#endif
> +		default:
> +			printf("Invalid Controller Index\n");
> +			return -1;
> +		}
> +		break;
> +	default:
> +		break;
> +	}
> +	return 0;
> +}
> +
> +int board_usb_cleanup(int index, enum usb_init_type init)
> +{
> +	switch (init) {
> +	case USB_INIT_DEVICE:
> +#if defined(CONFIG_LS1043A)
> +		dwc3_uboot_exit(index);
> +#endif
> +		break;
> +	default:
> +		break;
> +	}
> +	return 0;
> +}
> +#endif
> +
> +
> +
>  #ifdef CONFIG_BOARD_LATE_INIT
>  int board_late_init(void)
>  {
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> index 57b99d4..13ba1a6 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> @@ -328,6 +328,12 @@ struct ccsr_gur {
>  
>  #define SCFG_SNPCNFGCR_SECRDSNP		0x80000000
>  #define SCFG_SNPCNFGCR_SECWRSNP		0x40000000
> +#define SCFG_SNPCNFGCR_USB1RDSNP	0x00200000
> +#define SCFG_SNPCNFGCR_USB1WRSNP	0x00100000
> +#define SCFG_SNPCNFGCR_USB2RDSNP	0x00008000
> +#define SCFG_SNPCNFGCR_USB2WRSNP	0x00010000
> +#define SCFG_SNPCNFGCR_USB3RDSNP	0x00002000
> +#define SCFG_SNPCNFGCR_USB3WRSNP	0x00004000
>  
>  /* Supplemental Configuration Unit */
>  struct ccsr_scfg {
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h b/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
> new file mode 100644
> index 0000000..252c676
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
> @@ -0,0 +1,11 @@
> +/*
> + * Copyright 2016 Freescale Semiconductor
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_
> +#define _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_
> +
> +
> +#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_ */
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 85cc96a..5eeb71d 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -690,6 +690,18 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
>  		return -ENOMEM;
>  	}
>  
> +#if defined(CONFIG_LS1043A)

How was this added in Linux ? I doubt such horrid ifdef was allowed.
I presume it went through either DT or struct dwc3_device, right ?
So fix this here the same way.

> +	 /* Change burst beat and outstanding pipelined transfers requests */
> +	dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
> +		    (dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) & ~0xff) | 0xf);
> +	dwc3_writel(dwc->regs, DWC3_GSBUSCFG1,
> +		    dwc3_readl(dwc->regs, DWC3_GSBUSCFG1) | 0xf00);
> +
> +	/* Enable snooping */
> +	dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
> +		    dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) | 0x22220000);
> +#endif
> +
>  	if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
>  		dwc->dr_mode = USB_DR_MODE_HOST;
>  	else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))
>
Felipe Balbi May 31, 2016, 12:10 p.m. UTC | #2
Hi,

Marek Vasut <marex@denx.de> writes:
>> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
>> index 85cc96a..5eeb71d 100644
>> --- a/drivers/usb/dwc3/core.c
>> +++ b/drivers/usb/dwc3/core.c
>> @@ -690,6 +690,18 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
>>  		return -ENOMEM;
>>  	}
>>  
>> +#if defined(CONFIG_LS1043A)
>
> How was this added in Linux ? I doubt such horrid ifdef was allowed.
> I presume it went through either DT or struct dwc3_device, right ?
> So fix this here the same way.

dwc3 doesn't have any of that. I wouldn't take it :-p
Ɓukasz Majewski May 31, 2016, 2:55 p.m. UTC | #3
Hi Rajat,

> From: Rajesh Bhagat <rajesh.bhagat@nxp.com>
> 
> Implements the dwc3 gadget driver support for LS1043
> platform, and performs below operations:
> 1. Enables snooping support for DWC3 controller.
> 2. Enables cache coherency in LS1043 platform.
> 
> Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c            | 87
> +++++++++++++++++++++- .../include/asm/arch-fsl-layerscape/immap_lsch2.h
> |  6 ++ .../include/asm/arch-fsl-layerscape/sys_proto.h    | 11 +++
>  drivers/usb/dwc3/core.c                            | 12 +++
>  4 files changed, 114 insertions(+), 2 deletions(-)
>  create mode 100644
> arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 0fb5c7f..84b973d
> 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -17,6 +17,10 @@
>  #ifdef CONFIG_CHAIN_OF_TRUST
>  #include <fsl_validate.h>
>  #endif
> +#include <usb.h>
> +#include <dwc3-uboot.h>
> +#include <linux/usb/xhci-fsl.h>
> +
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -318,9 +322,12 @@ void fsl_lsch2_early_init_f(void)
>  #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
>  	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
>  #endif
> -	/* Make SEC reads and writes snoopable */
> +	/* Make SEC and USB reads and writes snoopable */
>  	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
> -		     SCFG_SNPCNFGCR_SECWRSNP);
> +		     SCFG_SNPCNFGCR_SECWRSNP |
> SCFG_SNPCNFGCR_USB1RDSNP |
> +		     SCFG_SNPCNFGCR_USB1WRSNP |
> SCFG_SNPCNFGCR_USB2RDSNP |
> +		     SCFG_SNPCNFGCR_USB2WRSNP |
> SCFG_SNPCNFGCR_USB3RDSNP |
> +		     SCFG_SNPCNFGCR_USB3WRSNP);
>  
>  	/*
>  	 * Enable snoop requests and DVM message requests for
> @@ -336,6 +343,82 @@ void fsl_lsch2_early_init_f(void)
>  }
>  #endif
>  
> +#ifdef CONFIG_USB_DWC3
> +
> +#if defined(CONFIG_LS1043A)
> +static struct dwc3_device dwc3_device_data0 = {
> +	.maximum_speed = USB_SPEED_HIGH,
> +	.base = CONFIG_SYS_FSL_XHCI_USB1_ADDR,
> +	.dr_mode = USB_DR_MODE_PERIPHERAL,
> +	.index = 0,
> +};
> +
> +static struct dwc3_device dwc3_device_data1 = {
> +	.maximum_speed = USB_SPEED_HIGH,
> +	.base = CONFIG_SYS_FSL_XHCI_USB2_ADDR,
> +	.dr_mode = USB_DR_MODE_PERIPHERAL,
> +	.index = 1,
> +};
> +
> +static struct dwc3_device dwc3_device_data2 = {
> +	.maximum_speed = USB_SPEED_HIGH,
> +	.base = CONFIG_SYS_FSL_XHCI_USB3_ADDR,
> +	.dr_mode = USB_DR_MODE_PERIPHERAL,
> +	.index = 2,
> +};
> +
> +int usb_gadget_handle_interrupts(int index)
> +{
> +	dwc3_uboot_handle_interrupt(index);
> +	return 0;
> +}
> +#endif
> +
> +int board_usb_init(int index, enum usb_init_type init)
> +{
> +	switch (init) {
> +	case USB_INIT_DEVICE:
> +		switch (index) {
> +#if defined(CONFIG_LS1043A)
> +		case 0:
> +			dwc3_uboot_init(&dwc3_device_data0);
> +			break;
> +
> +		case 1:
> +			dwc3_uboot_init(&dwc3_device_data1);
> +			break;
> +		case 2:
> +			dwc3_uboot_init(&dwc3_device_data2);
> +			break;
> +#endif
> +		default:
> +			printf("Invalid Controller Index\n");
> +			return -1;
> +		}
> +		break;
> +	default:
> +		break;
> +	}
> +	return 0;
> +}
> +
> +int board_usb_cleanup(int index, enum usb_init_type init)
> +{
> +	switch (init) {
> +	case USB_INIT_DEVICE:
> +#if defined(CONFIG_LS1043A)
> +		dwc3_uboot_exit(index);
> +#endif
> +		break;
> +	default:
> +		break;
> +	}
> +	return 0;
> +}
> +#endif
> +
> +
> +
>  #ifdef CONFIG_BOARD_LATE_INIT
>  int board_late_init(void)
>  {
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index
> 57b99d4..13ba1a6 100644 ---
> a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++
> b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -328,6
> +328,12 @@ struct ccsr_gur { 
>  #define SCFG_SNPCNFGCR_SECRDSNP		0x80000000
>  #define SCFG_SNPCNFGCR_SECWRSNP		0x40000000
> +#define SCFG_SNPCNFGCR_USB1RDSNP	0x00200000
> +#define SCFG_SNPCNFGCR_USB1WRSNP	0x00100000
> +#define SCFG_SNPCNFGCR_USB2RDSNP	0x00008000
> +#define SCFG_SNPCNFGCR_USB2WRSNP	0x00010000
> +#define SCFG_SNPCNFGCR_USB3RDSNP	0x00002000
> +#define SCFG_SNPCNFGCR_USB3WRSNP	0x00004000
>  
>  /* Supplemental Configuration Unit */
>  struct ccsr_scfg {
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
> b/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h new file mode
> 100644 index 0000000..252c676
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
> @@ -0,0 +1,11 @@
> +/*
> + * Copyright 2016 Freescale Semiconductor
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_
> +#define _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_
> +
> +
> +#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_ */
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 85cc96a..5eeb71d 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -690,6 +690,18 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
>  		return -ENOMEM;
>  	}
>  
> +#if defined(CONFIG_LS1043A)
> +	 /* Change burst beat and outstanding pipelined transfers
> requests */
> +	dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
> +		    (dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) & ~0xff)
> | 0xf);
> +	dwc3_writel(dwc->regs, DWC3_GSBUSCFG1,
> +		    dwc3_readl(dwc->regs, DWC3_GSBUSCFG1) | 0xf00);
> +
> +	/* Enable snooping */
> +	dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
> +		    dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) |
> 0x22220000); +#endif
> +
>  	if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
>  		dwc->dr_mode = USB_DR_MODE_HOST;
>  	else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))

Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Rajesh Bhagat June 1, 2016, 4:08 a.m. UTC | #4
> -----Original Message-----
> From: Felipe Balbi [mailto:felipe.balbi@linux.intel.com]
> Sent: Tuesday, May 31, 2016 5:40 PM
> To: Marek Vasut <marex@denx.de>; Rajat Srivastava <rajat.srivastava@nxp.com>;
> u-boot@lists.denx.de
> Cc: l.majewski@samsung.com; sjg@chromium.org; albert.u.boot@aribaud.net;
> prabhakar@freescale.com; york sun <york.sun@nxp.com>; Mingkai Hu
> <mingkai.hu@nxp.com>; Rajesh Bhagat <rajesh.bhagat@nxp.com>;
> michal.simek@xilinx.com
> Subject: Re: [PATCH 2/3] armv8/fsl-layerscape: add dwc3 gadget driver support
> 
> 
> Hi,
> 
> Marek Vasut <marex@denx.de> writes:
> >> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index
> >> 85cc96a..5eeb71d 100644
> >> --- a/drivers/usb/dwc3/core.c
> >> +++ b/drivers/usb/dwc3/core.c
> >> @@ -690,6 +690,18 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
> >>  		return -ENOMEM;
> >>  	}
> >>
> >> +#if defined(CONFIG_LS1043A)
> >
> > How was this added in Linux ? I doubt such horrid ifdef was allowed.
> > I presume it went through either DT or struct dwc3_device, right ?
> > So fix this here the same way.
> 
> dwc3 doesn't have any of that. I wouldn't take it :-p
> 

Hello Felipe/Marek,

It is not currently added in Linux, These registers setting is required for 
Setting the burst beat transactions and enabling the snooping for DWC3 USB IP. 

Can it be added using dwc3 uboot glue layer e.g. dwc3-fsl.c ?

Best Regards,
Rajesh Bhagat 

> --
> balbi
Felipe Balbi June 1, 2016, 6:37 a.m. UTC | #5
Hi,

Rajesh Bhagat <rajesh.bhagat@nxp.com> writes:
>> Marek Vasut <marex@denx.de> writes:
>> >> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index
>> >> 85cc96a..5eeb71d 100644
>> >> --- a/drivers/usb/dwc3/core.c
>> >> +++ b/drivers/usb/dwc3/core.c
>> >> @@ -690,6 +690,18 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
>> >>  		return -ENOMEM;
>> >>  	}
>> >>
>> >> +#if defined(CONFIG_LS1043A)
>> >
>> > How was this added in Linux ? I doubt such horrid ifdef was allowed.
>> > I presume it went through either DT or struct dwc3_device, right ?
>> > So fix this here the same way.
>> 
>> dwc3 doesn't have any of that. I wouldn't take it :-p
>> 
>
> Hello Felipe/Marek,
>
> It is not currently added in Linux, These registers setting is required for 
> Setting the burst beat transactions and enabling the snooping for DWC3 USB IP. 

that's fine, but you don't need to ifdef around that. Pass these values
from your platform code.

> Can it be added using dwc3 uboot glue layer e.g. dwc3-fsl.c ?

keep in core, but pass them from plat code instead of hardcoding under ifdef.

Also, get rid of the magic constant ;-)
Rajesh Bhagat June 1, 2016, 7:07 a.m. UTC | #6
> -----Original Message-----
> From: Felipe Balbi [mailto:felipe.balbi@linux.intel.com]
> Sent: Wednesday, June 01, 2016 12:07 PM
> To: Rajesh Bhagat <rajesh.bhagat@nxp.com>; Marek Vasut <marex@denx.de>;
> Rajat Srivastava <rajat.srivastava@nxp.com>; u-boot@lists.denx.de
> Cc: l.majewski@samsung.com; sjg@chromium.org; albert.u.boot@aribaud.net;
> prabhakar@freescale.com; york sun <york.sun@nxp.com>; Mingkai Hu
> <mingkai.hu@nxp.com>; michal.simek@xilinx.com
> Subject: RE: [PATCH 2/3] armv8/fsl-layerscape: add dwc3 gadget driver support
> 
> 
> Hi,
> 
> Rajesh Bhagat <rajesh.bhagat@nxp.com> writes:
> >> Marek Vasut <marex@denx.de> writes:
> >> >> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> >> >> index 85cc96a..5eeb71d 100644
> >> >> --- a/drivers/usb/dwc3/core.c
> >> >> +++ b/drivers/usb/dwc3/core.c
> >> >> @@ -690,6 +690,18 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
> >> >>  		return -ENOMEM;
> >> >>  	}
> >> >>
> >> >> +#if defined(CONFIG_LS1043A)
> >> >
> >> > How was this added in Linux ? I doubt such horrid ifdef was allowed.
> >> > I presume it went through either DT or struct dwc3_device, right ?
> >> > So fix this here the same way.
> >>
> >> dwc3 doesn't have any of that. I wouldn't take it :-p
> >>
> >
> > Hello Felipe/Marek,
> >
> > It is not currently added in Linux, These registers setting is
> > required for Setting the burst beat transactions and enabling the snooping for DWC3
> USB IP.
> 
> that's fine, but you don't need to ifdef around that. Pass these values from your
> platform code.
> 
> > Can it be added using dwc3 uboot glue layer e.g. dwc3-fsl.c ?
> 
> keep in core, but pass them from plat code instead of hardcoding under ifdef.
> 
> Also, get rid of the magic constant ;-)
> 

Ok, thanks. Will take care in v2. 

> --
> balbi
diff mbox

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 0fb5c7f..84b973d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -17,6 +17,10 @@ 
 #ifdef CONFIG_CHAIN_OF_TRUST
 #include <fsl_validate.h>
 #endif
+#include <usb.h>
+#include <dwc3-uboot.h>
+#include <linux/usb/xhci-fsl.h>
+
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -318,9 +322,12 @@  void fsl_lsch2_early_init_f(void)
 #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
 	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
 #endif
-	/* Make SEC reads and writes snoopable */
+	/* Make SEC and USB reads and writes snoopable */
 	setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
-		     SCFG_SNPCNFGCR_SECWRSNP);
+		     SCFG_SNPCNFGCR_SECWRSNP | SCFG_SNPCNFGCR_USB1RDSNP |
+		     SCFG_SNPCNFGCR_USB1WRSNP | SCFG_SNPCNFGCR_USB2RDSNP |
+		     SCFG_SNPCNFGCR_USB2WRSNP | SCFG_SNPCNFGCR_USB3RDSNP |
+		     SCFG_SNPCNFGCR_USB3WRSNP);
 
 	/*
 	 * Enable snoop requests and DVM message requests for
@@ -336,6 +343,82 @@  void fsl_lsch2_early_init_f(void)
 }
 #endif
 
+#ifdef CONFIG_USB_DWC3
+
+#if defined(CONFIG_LS1043A)
+static struct dwc3_device dwc3_device_data0 = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = CONFIG_SYS_FSL_XHCI_USB1_ADDR,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 0,
+};
+
+static struct dwc3_device dwc3_device_data1 = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = CONFIG_SYS_FSL_XHCI_USB2_ADDR,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 1,
+};
+
+static struct dwc3_device dwc3_device_data2 = {
+	.maximum_speed = USB_SPEED_HIGH,
+	.base = CONFIG_SYS_FSL_XHCI_USB3_ADDR,
+	.dr_mode = USB_DR_MODE_PERIPHERAL,
+	.index = 2,
+};
+
+int usb_gadget_handle_interrupts(int index)
+{
+	dwc3_uboot_handle_interrupt(index);
+	return 0;
+}
+#endif
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+	switch (init) {
+	case USB_INIT_DEVICE:
+		switch (index) {
+#if defined(CONFIG_LS1043A)
+		case 0:
+			dwc3_uboot_init(&dwc3_device_data0);
+			break;
+
+		case 1:
+			dwc3_uboot_init(&dwc3_device_data1);
+			break;
+		case 2:
+			dwc3_uboot_init(&dwc3_device_data2);
+			break;
+#endif
+		default:
+			printf("Invalid Controller Index\n");
+			return -1;
+		}
+		break;
+	default:
+		break;
+	}
+	return 0;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+	switch (init) {
+	case USB_INIT_DEVICE:
+#if defined(CONFIG_LS1043A)
+		dwc3_uboot_exit(index);
+#endif
+		break;
+	default:
+		break;
+	}
+	return 0;
+}
+#endif
+
+
+
 #ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 57b99d4..13ba1a6 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -328,6 +328,12 @@  struct ccsr_gur {
 
 #define SCFG_SNPCNFGCR_SECRDSNP		0x80000000
 #define SCFG_SNPCNFGCR_SECWRSNP		0x40000000
+#define SCFG_SNPCNFGCR_USB1RDSNP	0x00200000
+#define SCFG_SNPCNFGCR_USB1WRSNP	0x00100000
+#define SCFG_SNPCNFGCR_USB2RDSNP	0x00008000
+#define SCFG_SNPCNFGCR_USB2WRSNP	0x00010000
+#define SCFG_SNPCNFGCR_USB3RDSNP	0x00002000
+#define SCFG_SNPCNFGCR_USB3WRSNP	0x00004000
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h b/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
new file mode 100644
index 0000000..252c676
--- /dev/null
+++ b/arch/arm/include/asm/arch-fsl-layerscape/sys_proto.h
@@ -0,0 +1,11 @@ 
+/*
+ * Copyright 2016 Freescale Semiconductor
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_
+#define _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_
+
+
+#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SYS_PROTO_H_ */
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 85cc96a..5eeb71d 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -690,6 +690,18 @@  int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 		return -ENOMEM;
 	}
 
+#if defined(CONFIG_LS1043A)
+	 /* Change burst beat and outstanding pipelined transfers requests */
+	dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
+		    (dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) & ~0xff) | 0xf);
+	dwc3_writel(dwc->regs, DWC3_GSBUSCFG1,
+		    dwc3_readl(dwc->regs, DWC3_GSBUSCFG1) | 0xf00);
+
+	/* Enable snooping */
+	dwc3_writel(dwc->regs, DWC3_GSBUSCFG0,
+		    dwc3_readl(dwc->regs, DWC3_GSBUSCFG0) | 0x22220000);
+#endif
+
 	if (IS_ENABLED(CONFIG_USB_DWC3_HOST))
 		dwc->dr_mode = USB_DR_MODE_HOST;
 	else if (IS_ENABLED(CONFIG_USB_DWC3_GADGET))