diff mbox

[i386] : Improve IS_STACK_MODE and use it some more

Message ID CAFULd4Z8t5L43dmYhj_3S_Wsfh+OtpwvmRJ9qhHBKXT+vYnUOg@mail.gmail.com
State New
Headers show

Commit Message

Uros Bizjak May 23, 2016, 7:01 p.m. UTC
Hello!

2016-05-23  Uros Bizjak  <ubizjak@gmail.com>

    * config/i386/i386.h (IS_STACK_MODE): Enable for
    TARGET_MIX_SSE_I387.  Rewrite using X87_FLOAT_MODE_P and
    SSE_FLOAT_MODE_P macros.
    * config/i386/i386.c (ix86_preferred_reload_class): Use
    IS_STACK_MODE, INTEGER_CLASS_P and FLOAT_CLASS_P macros.  Cleanup
    regclass processing for CONST_DOUBLE_P.
    (ix86_preferred_output_reload_class): Use IS_STACK_MODE macro.
    (ix86_rtx_costs): Remove redundant TARGET_80387 check
    with IS_STACK_MODE macro.
    * config/i386/i386.md: Replace SSE_FLOAT_MODE_P (DFmode)
    with TARGET_SSE2.
    (*movdf_internal): Use IS_STACK_MODE macro.
    (*movsf_internal): Ditto.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN.

Uros.
diff mbox

Patch

Index: i386.c
===================================================================
--- i386.c	(revision 236592)
+++ i386.c	(working copy)
@@ -43301,37 +43301,35 @@ 
 	  || MAYBE_MASK_CLASS_P (regclass)))
     return NO_REGS;
 
-  /* Prefer SSE regs only, if we can use them for math.  */
-  if (TARGET_SSE_MATH && !TARGET_MIX_SSE_I387 && SSE_FLOAT_MODE_P (mode))
-    return SSE_CLASS_P (regclass) ? regclass : NO_REGS;
-
   /* Floating-point constants need more complex checks.  */
   if (CONST_DOUBLE_P (x))
     {
       /* General regs can load everything.  */
-      if (reg_class_subset_p (regclass, GENERAL_REGS))
+      if (INTEGER_CLASS_P (regclass))
         return regclass;
 
       /* Floats can load 0 and 1 plus some others.  Note that we eliminated
 	 zero above.  We only want to wind up preferring 80387 registers if
 	 we plan on doing computation with them.  */
-      if (TARGET_80387
+      if (IS_STACK_MODE (mode)
 	  && standard_80387_constant_p (x) > 0)
 	{
-	  /* Limit class to non-sse.  */
-	  if (regclass == FLOAT_SSE_REGS)
+	  /* Limit class to FP regs.  */
+	  if (FLOAT_CLASS_P (regclass))
 	    return FLOAT_REGS;
-	  if (regclass == FP_TOP_SSE_REGS)
+	  else if (regclass == FP_TOP_SSE_REGS)
 	    return FP_TOP_REG;
-	  if (regclass == FP_SECOND_SSE_REGS)
+	  else if (regclass == FP_SECOND_SSE_REGS)
 	    return FP_SECOND_REG;
-	  if (regclass == FLOAT_INT_REGS || regclass == FLOAT_REGS)
-	    return regclass;
 	}
 
       return NO_REGS;
     }
 
+  /* Prefer SSE regs only, if we can use them for math.  */
+  if (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)
+    return SSE_CLASS_P (regclass) ? regclass : NO_REGS;
+
   /* Generally when we see PLUS here, it's the function invariant
      (plus soft-fp const_int).  Which can only be computed into general
      regs.  */
@@ -43363,10 +43361,10 @@ 
      math on.  If we would like not to return a subset of CLASS, reject this
      alternative: if reload cannot do this, it will still use its choice.  */
   mode = GET_MODE (x);
-  if (TARGET_SSE_MATH && SSE_FLOAT_MODE_P (mode))
+  if (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)
     return MAYBE_SSE_CLASS_P (regclass) ? ALL_SSE_REGS : NO_REGS;
 
-  if (X87_FLOAT_MODE_P (mode))
+  if (IS_STACK_MODE (mode))
     {
       if (regclass == FP_TOP_SSE_REGS)
 	return FP_TOP_REG;
@@ -44071,7 +44069,7 @@ 
       return true;
 
     case CONST_DOUBLE:
-      if (TARGET_80387 && IS_STACK_MODE (mode))
+      if (IS_STACK_MODE (mode))
 	switch (standard_80387_constant_p (x))
 	  {
 	  case -1:
Index: i386.h
===================================================================
--- i386.h	(revision 236592)
+++ i386.h	(working copy)
@@ -957,10 +957,10 @@ 
 
 #define STACK_REGS
 
-#define IS_STACK_MODE(MODE)					\
-  (((MODE) == SFmode && !(TARGET_SSE && TARGET_SSE_MATH))	\
-   || ((MODE) == DFmode && !(TARGET_SSE2 && TARGET_SSE_MATH))	\
-   || (MODE) == XFmode)
+#define IS_STACK_MODE(MODE)				\
+  (X87_FLOAT_MODE_P (MODE)				\
+   && (!(SSE_FLOAT_MODE_P (MODE) && TARGET_SSE_MATH)	\
+       || TARGET_MIX_SSE_I387))
 
 /* Number of actual hardware registers.
    The hardware registers are assigned numbers for the compiler
Index: i386.md
===================================================================
--- i386.md	(revision 236592)
+++ i386.md	(working copy)
@@ -3276,7 +3276,7 @@ 
        || !CONST_DOUBLE_P (operands[1])
        || ((optimize_function_for_size_p (cfun)
 	    || (ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC))
-	   && ((!(TARGET_SSE2 && TARGET_SSE_MATH)
+	   && ((IS_STACK_MODE (DFmode)
 		&& standard_80387_constant_p (operands[1]) > 0)
 	       || (TARGET_SSE2 && TARGET_SSE_MATH
 		   && standard_sse_constant_p (operands[1], DFmode) == 1))
@@ -3478,9 +3478,9 @@ 
        || !CONST_DOUBLE_P (operands[1])
        || ((optimize_function_for_size_p (cfun)
 	    || (ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC))
-	   && ((!TARGET_SSE_MATH
+	   && ((IS_STACK_MODE (SFmode)
 		&& standard_80387_constant_p (operands[1]) > 0)
-	       || (TARGET_SSE_MATH
+	       || (TARGET_SSE && TARGET_SSE_MATH
 		   && standard_sse_constant_p (operands[1], SFmode) == 1)))
        || memory_operand (operands[0], SFmode)
        || !TARGET_HARD_SF_REGS)"
@@ -4197,13 +4197,13 @@ 
 (define_expand "extendsfdf2"
   [(set (match_operand:DF 0 "nonimm_ssenomem_operand")
         (float_extend:DF (match_operand:SF 1 "general_operand")))]
-  "TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)"
+  "TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)"
 {
   /* ??? Needed for compress_float_constant since all fp constants
      are TARGET_LEGITIMATE_CONSTANT_P.  */
   if (CONST_DOUBLE_P (operands[1]))
     {
-      if ((!SSE_FLOAT_MODE_P (DFmode) || TARGET_MIX_SSE_I387)
+      if ((!TARGET_SSE2 || TARGET_MIX_SSE_I387)
 	  && standard_80387_constant_p (operands[1]) > 0)
 	{
 	  operands[1] = simplify_const_unary_operation
@@ -4286,7 +4286,7 @@ 
   [(set (match_operand:DF 0 "nonimm_ssenomem_operand" "=f,m,v")
         (float_extend:DF
 	  (match_operand:SF 1 "nonimmediate_operand" "fm,f,vm")))]
-  "TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)"
+  "TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)"
 {
   switch (which_alternative)
     {
@@ -4306,7 +4306,7 @@ 
    (set_attr "mode" "SF,XF,DF")
    (set (attr "enabled")
      (if_then_else
-       (match_test ("SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH"))
+       (match_test ("TARGET_SSE2 && TARGET_SSE_MATH"))
        (if_then_else
 	 (eq_attr "alternative" "0,1")
 	 (symbol_ref "TARGET_MIX_SSE_I387")
@@ -4357,9 +4357,9 @@ 
   [(set (match_operand:SF 0 "nonimmediate_operand")
 	(float_truncate:SF
 	  (match_operand:DF 1 "nonimmediate_operand")))]
-  "TARGET_80387 || (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)"
+  "TARGET_80387 || (TARGET_SSE2 && TARGET_SSE_MATH)"
 {
-  if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH && !TARGET_MIX_SSE_I387)
+  if (TARGET_SSE2 && TARGET_SSE_MATH && !TARGET_MIX_SSE_I387)
     ;
   else if (flag_unsafe_math_optimizations)
     ;
@@ -4439,7 +4439,7 @@ 
   [(set (match_operand:SF 0 "nonimmediate_operand"   "=fm,v")
         (float_truncate:SF
           (match_operand:DF 1 "nonimmediate_operand" "f  ,vm")))]
-  "SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH"
+  "TARGET_SSE2 && TARGET_SSE_MATH"
 {
   switch (which_alternative)
     {