Message ID | 1463703055-17484-3-git-send-email-d-allred@ti.com |
---|---|
State | Accepted |
Delegated to: | Tom Rini |
Headers | show |
On Thu, May 19, 2016 at 07:10:42PM -0500, Daniel Allred wrote: > From: Madan Srinivas <madans@ti.com> > > Adds a new Kconfig file for AM33xx class devices. We > need a common place to define CONFIG parameters > for these SOCs, especially for adding support > for secure devices. > > a) Adds a definition for ISW_ENTRY_ADDR. This is the > address to which the ROM branches when the SOC > ROM hands off execution to the boot loader. > CONFIG_SYS_TEXT_BASE and CONFIG_SPL_TEXT_BASE are set > to this value for AM43xx devices. > > b) Adds CONFIG_PUB_ROM_DATA_SIZE which is used to > calculate CONFIG_SPL_MAX_SIZE. This value indicates the > amount of memory needed by the ROM to store data during > the boot process. > > Currently, these CONFIG options are used only by AM43xx, > but in future other AM33xx class SOCs will also use them. > > Signed-off-by: Madan Srinivas <madans@ti.com> > Signed-off-by: Daniel Allred <d-allred@ti.com> > > Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> > Tested-by: Andreas Dannenberg <dannenberg@ti.com> > Reviewed-by: Tom Rini <trini@konsulko.com> Applied to u-boot/master, thanks!
diff --git a/arch/arm/cpu/armv7/am33xx/Kconfig b/arch/arm/cpu/armv7/am33xx/Kconfig new file mode 100644 index 0000000..39759cd --- /dev/null +++ b/arch/arm/cpu/armv7/am33xx/Kconfig @@ -0,0 +1,27 @@ +config ISW_ENTRY_ADDR + hex "Address in memory or XIP flash of bootloader entry point" + help + After any reset, the boot ROM on the AM43XX SOC + searches the boot media for a valid boot image. + For non-XIP devices, the ROM then copies the + image into internal memory. + For all boot modes, after the ROM processes the + boot image it eventually computes the entry + point address depending on the device type + (secure/non-secure), boot media (xip/non-xip) and + image headers. + default 0x402F4000 + +config PUB_ROM_DATA_SIZE + hex "Size in bytes of the L3 SRAM reserved by ROM to store data" + help + During the device boot, the public ROM uses the top of + the public L3 OCMC RAM to store r/w data like stack, + heap, globals etc. When the ROM is copying the boot + image from the boot media into memory, the image must + not spill over into this area. This value can be used + during compile time to determine the maximum size of a + boot image. Once the ROM transfers control to the boot + image, this area is no longer used, and can be reclaimed + for run time use by the boot image. + default 0x8400