diff mbox

[U-Boot,v3,04/11] ARMv7: PSCI: update the place of saving target PC

Message ID 1463562634-16723-5-git-send-email-hongbo.zhang@nxp.com
State Superseded
Delegated to: York Sun
Headers show

Commit Message

macro.wave.z@gmail.com May 18, 2016, 9:10 a.m. UTC 
From: Hongbo Zhang <hongbo.zhang@nxp.com>

The legacy code reserves one word in each stack for saving target PC, but it
isn't used, the target PC is still saved to where the stack top pointer points.
This patch relocates the place for saving target PC to the lowest address of
each stack, convinience is that we can save more contents if needed ilater next
to saved target PC without re-adjust the stack top pointer.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
---
 arch/arm/cpu/armv7/ls102xa/psci.S     | 1 +
 arch/arm/cpu/armv7/mx7/psci.S         | 1 +
 arch/arm/cpu/armv7/psci.S             | 3 ++-
 arch/arm/cpu/armv7/sunxi/psci_sun6i.S | 3 ++-
 arch/arm/cpu/armv7/sunxi/psci_sun7i.S | 3 ++-
 arch/arm/include/asm/psci.h           | 1 +
 arch/arm/mach-tegra/psci.S            | 3 ++-
 7 files changed, 11 insertions(+), 4 deletions(-)
diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/ls102xa/psci.S b/arch/arm/cpu/armv7/ls102xa/psci.S
index 0b067d9..e1293ed 100644
--- a/arch/arm/cpu/armv7/ls102xa/psci.S
+++ b/arch/arm/cpu/armv7/ls102xa/psci.S
@@ -37,6 +37,7 @@  psci_cpu_on:
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
 	str	r2, [r0]
 	dsb
 
diff --git a/arch/arm/cpu/armv7/mx7/psci.S b/arch/arm/cpu/armv7/mx7/psci.S
index 34c6ab3..02ca076 100644
--- a/arch/arm/cpu/armv7/mx7/psci.S
+++ b/arch/arm/cpu/armv7/mx7/psci.S
@@ -31,6 +31,7 @@  psci_cpu_on:
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
 	str	r2, [r0]
 	dsb
 
diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
index 2913e07..0865712 100644
--- a/arch/arm/cpu/armv7/psci.S
+++ b/arch/arm/cpu/armv7/psci.S
@@ -216,7 +216,8 @@  ENTRY(psci_cpu_entry)
 
 	bl	psci_get_cpu_id			@ CPU ID => r0
 	bl	psci_get_cpu_stack_top		@ stack top => r0
-	ldr	r0, [r0]			@ target PC at stack top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
+	ldr	r0, [r0]			@ get target PC
 	b	_do_nonsec_entry
 ENDPROC(psci_cpu_entry)
 
diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
index ac722e4..51241ec 100644
--- a/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun6i.S
@@ -136,7 +136,8 @@  psci_cpu_on:
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top	@ get stack top of target CPU
-	str	r2, [r0]		@ store target PC at stack top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
+	str	r2, [r0]		@ store target PC
 	dsb
 
 	movw	r0, #(SUN6I_CPUCFG_BASE & 0xffff)
diff --git a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
index 59d7ff0..50ba355 100644
--- a/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
+++ b/arch/arm/cpu/armv7/sunxi/psci_sun7i.S
@@ -125,7 +125,8 @@  psci_cpu_on:
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top	@ get stack top of target CPU
-	str	r2, [r0]		@ store target PC at stack top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
+	str	r2, [r0]		@ store target PC
 	dsb
 
 	movw	r0, #(SUN7I_CPUCFG_BASE & 0xffff)
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 47a2ea4..d0f5d26 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -20,6 +20,7 @@ 
 
 /* size of percpu stack, 1kB */
 #define PSCI_PERCPU_STACK_SIZE		0x400
+#define PSCI_TARGET_PC_OFFSET		(PSCI_PERCPU_STACK_SIZE - 4)
 
 /* PSCI interfaces */
 #define PSCI_FN_BASE			0x84000000
diff --git a/arch/arm/mach-tegra/psci.S b/arch/arm/mach-tegra/psci.S
index 5f326c9..037c142 100644
--- a/arch/arm/mach-tegra/psci.S
+++ b/arch/arm/mach-tegra/psci.S
@@ -92,7 +92,8 @@  ENTRY(psci_cpu_on)
 
 	mov	r0, r1
 	bl	psci_get_cpu_stack_top	@ get stack top of target CPU
-	str	r2, [r0]		@ store target PC at stack top
+	sub	r0, r0, #PSCI_TARGET_PC_OFFSET
+	str	r2, [r0]		@ store target PC
 	dsb
 
 	ldr	r6, =TEGRA_RESET_EXCEPTION_VECTOR