| Message ID | 1462632397-11224-5-git-send-email-bmeng.cn@gmail.com |
|---|---|
| State | Accepted |
| Commit | 07ac84eaaa5daeae4a56ff70649a3e50fc470db5 |
| Delegated to: | Bin Meng |
| Headers | show |
On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote: > Reserve IRQ9 which is to be used as SCI interrupt number > for ACPI in PIC mode. > > Signed-off-by: Bin Meng <bmeng.cn@gmail.com> > Reviewed-by: Stefan Roese <sr@denx.de> > Tested-by: Stefan Roese <sr@denx.de> > > --- > > Changes in v2: > - Change to use IS_ENABLED() > > arch/x86/cpu/irq.c | 5 +++++ > 1 file changed, 5 insertions(+) Reviewed-by: Simon Glass <sjg@chromium.org>
On Sun, May 8, 2016 at 2:46 AM, Simon Glass <sjg@chromium.org> wrote: > On 7 May 2016 at 08:46, Bin Meng <bmeng.cn@gmail.com> wrote: >> Reserve IRQ9 which is to be used as SCI interrupt number >> for ACPI in PIC mode. >> >> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> >> Reviewed-by: Stefan Roese <sr@denx.de> >> Tested-by: Stefan Roese <sr@denx.de> >> >> --- >> >> Changes in v2: >> - Change to use IS_ENABLED() >> >> arch/x86/cpu/irq.c | 5 +++++ >> 1 file changed, 5 insertions(+) > > Reviewed-by: Simon Glass <sjg@chromium.org> applied to u-boot-x86/next, thanks!
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c index 2950783..7586fc2 100644 --- a/arch/x86/cpu/irq.c +++ b/arch/x86/cpu/irq.c @@ -121,6 +121,11 @@ static int create_pirq_routing_table(struct udevice *dev) priv->irq_mask = fdtdec_get_int(blob, node, "intel,pirq-mask", PIRQ_BITMAP); + if (IS_ENABLED(CONFIG_GENERATE_ACPI_TABLE)) { + /* Reserve IRQ9 for SCI */ + priv->irq_mask &= ~(1 << 9); + } + if (priv->config == PIRQ_VIA_IBASE) { int ibase_off;