diff mbox

mtd: spi-nor: support GigaDevice gd25lq64c

Message ID 1462496421-76186-1-git-send-email-computersforpeace@gmail.com
State Superseded
Headers show

Commit Message

Brian Norris May 6, 2016, 1 a.m. UTC
Also note the GigaDevice JEDEC ID.

No write-protect support yet, since this flash uses a different status
register layout.

Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 include/linux/mtd/spi-nor.h   | 1 +
 2 files changed, 2 insertions(+)

Comments

Marek Vasut May 6, 2016, 1:35 a.m. UTC | #1
On 05/06/2016 03:00 AM, Brian Norris wrote:
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -832,6 +832,7 @@ static const struct flash_info spi_nor_ids[] = {
>  	/* GigaDevice */
>  	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
>  	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
> +	{ "gd25lq64c", INFO(0xc86017, 0, 64 * 1024, 128, SECT_4K | SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

It's enough to use one SECT_4K , it will work just fine :-)

>  	{ "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
Brian Norris May 6, 2016, 3:37 p.m. UTC | #2
On Fri, May 06, 2016 at 03:35:30AM +0200, Marek Vasut wrote:
> On 05/06/2016 03:00 AM, Brian Norris wrote:
> > --- a/drivers/mtd/spi-nor/spi-nor.c
> > +++ b/drivers/mtd/spi-nor/spi-nor.c
> > @@ -832,6 +832,7 @@ static const struct flash_info spi_nor_ids[] = {
> >  	/* GigaDevice */
> >  	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
> >  	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
> > +	{ "gd25lq64c", INFO(0xc86017, 0, 64 * 1024, 128, SECT_4K | SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
> 
> It's enough to use one SECT_4K , it will work just fine :-)

Of course :) Maybe I should read my own patch next time. Will send v2
shortly.

Thanks,
Brian

> >  	{ "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
> 
> 
> -- 
> Best regards,
> Marek Vasut
Marek Vasut May 6, 2016, 4:24 p.m. UTC | #3
On 05/06/2016 05:37 PM, Brian Norris wrote:
> On Fri, May 06, 2016 at 03:35:30AM +0200, Marek Vasut wrote:
>> On 05/06/2016 03:00 AM, Brian Norris wrote:
>>> --- a/drivers/mtd/spi-nor/spi-nor.c
>>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>>> @@ -832,6 +832,7 @@ static const struct flash_info spi_nor_ids[] = {
>>>  	/* GigaDevice */
>>>  	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
>>>  	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
>>> +	{ "gd25lq64c", INFO(0xc86017, 0, 64 * 1024, 128, SECT_4K | SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
>>
>> It's enough to use one SECT_4K , it will work just fine :-)
> 
> Of course :) Maybe I should read my own patch next time. Will send v2
> shortly.

You can see Linus's law in action here though ;-)

> Thanks,
> Brian
> 
>>>  	{ "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
>>
>>
>> -- 
>> Best regards,
>> Marek Vasut
diff mbox

Patch

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 157841dc3e99..0422fd3aae0c 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -832,6 +832,7 @@  static const struct flash_info spi_nor_ids[] = {
 	/* GigaDevice */
 	{ "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SECT_4K) },
+	{ "gd25lq64c", INFO(0xc86017, 0, 64 * 1024, 128, SECT_4K | SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SECT_4K) },
 
 	/* Intel/Numonyx -- xxxs33b */
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 3c36113a88e1..7f041bd88b82 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -21,6 +21,7 @@ 
  * Sometimes these are the same as CFI IDs, but sometimes they aren't.
  */
 #define SNOR_MFR_ATMEL		CFI_MFR_ATMEL
+#define SNOR_MFR_GIGADEVICE	0xc8
 #define SNOR_MFR_INTEL		CFI_MFR_INTEL
 #define SNOR_MFR_MICRON		CFI_MFR_ST /* ST Micro <--> Micron */
 #define SNOR_MFR_MACRONIX	CFI_MFR_MACRONIX