| Message ID | 20160504195303.GT26501@tucnak.zalov.cz |
|---|---|
| State | New |
| Headers | show |
On 04 May 21:53, Jakub Jelinek wrote: > Hi! > > AVX512BW has EVEX insns for these. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? OK for trunk. -- Thanks, K > > 2016-05-04 Jakub Jelinek <jakub@redhat.com> > > * config/i386/sse.md (*<code>v8hi3, *<code>v16qi3): Add > avx512bw alternative. > > --- gcc/config/i386/sse.md.jj 2016-05-04 14:36:08.000000000 +0200 > +++ gcc/config/i386/sse.md 2016-05-04 15:16:44.180894303 +0200 > @@ -10442,19 +10459,20 @@ (define_insn "*sse4_1_<code><mode>3<mask > (set_attr "mode" "TI")]) > > (define_insn "*<code>v8hi3" > - [(set (match_operand:V8HI 0 "register_operand" "=x,x") > + [(set (match_operand:V8HI 0 "register_operand" "=x,x,v") > (smaxmin:V8HI > - (match_operand:V8HI 1 "vector_operand" "%0,x") > - (match_operand:V8HI 2 "vector_operand" "xBm,xm")))] > + (match_operand:V8HI 1 "vector_operand" "%0,x,v") > + (match_operand:V8HI 2 "vector_operand" "xBm,xm,vm")))] > "TARGET_SSE2 && ix86_binary_operator_ok (<CODE>, V8HImode, operands)" > "@ > p<maxmin_int>w\t{%2, %0|%0, %2} > + vp<maxmin_int>w\t{%2, %1, %0|%0, %1, %2} > vp<maxmin_int>w\t{%2, %1, %0|%0, %1, %2}" > - [(set_attr "isa" "noavx,avx") > + [(set_attr "isa" "noavx,avx,avx512bw") > (set_attr "type" "sseiadd") > - (set_attr "prefix_data16" "1,*") > - (set_attr "prefix_extra" "*,1") > - (set_attr "prefix" "orig,vex") > + (set_attr "prefix_data16" "1,*,*") > + (set_attr "prefix_extra" "*,1,1") > + (set_attr "prefix" "orig,vex,evex") > (set_attr "mode" "TI")]) > > (define_expand "<code><mode>3" > @@ -10526,19 +10544,20 @@ (define_insn "*sse4_1_<code><mode>3<mask > (set_attr "mode" "TI")]) > > (define_insn "*<code>v16qi3" > - [(set (match_operand:V16QI 0 "register_operand" "=x,x") > + [(set (match_operand:V16QI 0 "register_operand" "=x,x,v") > (umaxmin:V16QI > - (match_operand:V16QI 1 "vector_operand" "%0,x") > - (match_operand:V16QI 2 "vector_operand" "xBm,xm")))] > + (match_operand:V16QI 1 "vector_operand" "%0,x,v") > + (match_operand:V16QI 2 "vector_operand" "xBm,xm,vm")))] > "TARGET_SSE2 && ix86_binary_operator_ok (<CODE>, V16QImode, operands)" > "@ > p<maxmin_int>b\t{%2, %0|%0, %2} > + vp<maxmin_int>b\t{%2, %1, %0|%0, %1, %2} > vp<maxmin_int>b\t{%2, %1, %0|%0, %1, %2}" > - [(set_attr "isa" "noavx,avx") > + [(set_attr "isa" "noavx,avx,avx512bw") > (set_attr "type" "sseiadd") > - (set_attr "prefix_data16" "1,*") > - (set_attr "prefix_extra" "*,1") > - (set_attr "prefix" "orig,vex") > + (set_attr "prefix_data16" "1,*,*") > + (set_attr "prefix_extra" "*,1,1") > + (set_attr "prefix" "orig,vex,evex") > (set_attr "mode" "TI")]) > > ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; > > Jakub
--- gcc/config/i386/sse.md.jj 2016-05-04 14:36:08.000000000 +0200 +++ gcc/config/i386/sse.md 2016-05-04 15:16:44.180894303 +0200 @@ -10442,19 +10459,20 @@ (define_insn "*sse4_1_<code><mode>3<mask (set_attr "mode" "TI")]) (define_insn "*<code>v8hi3" - [(set (match_operand:V8HI 0 "register_operand" "=x,x") + [(set (match_operand:V8HI 0 "register_operand" "=x,x,v") (smaxmin:V8HI - (match_operand:V8HI 1 "vector_operand" "%0,x") - (match_operand:V8HI 2 "vector_operand" "xBm,xm")))] + (match_operand:V8HI 1 "vector_operand" "%0,x,v") + (match_operand:V8HI 2 "vector_operand" "xBm,xm,vm")))] "TARGET_SSE2 && ix86_binary_operator_ok (<CODE>, V8HImode, operands)" "@ p<maxmin_int>w\t{%2, %0|%0, %2} + vp<maxmin_int>w\t{%2, %1, %0|%0, %1, %2} vp<maxmin_int>w\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "isa" "noavx,avx") + [(set_attr "isa" "noavx,avx,avx512bw") (set_attr "type" "sseiadd") - (set_attr "prefix_data16" "1,*") - (set_attr "prefix_extra" "*,1") - (set_attr "prefix" "orig,vex") + (set_attr "prefix_data16" "1,*,*") + (set_attr "prefix_extra" "*,1,1") + (set_attr "prefix" "orig,vex,evex") (set_attr "mode" "TI")]) (define_expand "<code><mode>3" @@ -10526,19 +10544,20 @@ (define_insn "*sse4_1_<code><mode>3<mask (set_attr "mode" "TI")]) (define_insn "*<code>v16qi3" - [(set (match_operand:V16QI 0 "register_operand" "=x,x") + [(set (match_operand:V16QI 0 "register_operand" "=x,x,v") (umaxmin:V16QI - (match_operand:V16QI 1 "vector_operand" "%0,x") - (match_operand:V16QI 2 "vector_operand" "xBm,xm")))] + (match_operand:V16QI 1 "vector_operand" "%0,x,v") + (match_operand:V16QI 2 "vector_operand" "xBm,xm,vm")))] "TARGET_SSE2 && ix86_binary_operator_ok (<CODE>, V16QImode, operands)" "@ p<maxmin_int>b\t{%2, %0|%0, %2} + vp<maxmin_int>b\t{%2, %1, %0|%0, %1, %2} vp<maxmin_int>b\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "isa" "noavx,avx") + [(set_attr "isa" "noavx,avx,avx512bw") (set_attr "type" "sseiadd") - (set_attr "prefix_data16" "1,*") - (set_attr "prefix_extra" "*,1") - (set_attr "prefix" "orig,vex") + (set_attr "prefix_data16" "1,*,*") + (set_attr "prefix_extra" "*,1,1") + (set_attr "prefix" "orig,vex,evex") (set_attr "mode" "TI")]) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;