diff mbox

Allow xmm16-xmm31 in *trunc* insns

Message ID 20160503112506.GW26501@tucnak.zalov.cz
State New
Headers show

Commit Message

Jakub Jelinek May 3, 2016, 11:25 a.m. UTC
Hi!

As the testcase shows, in some truncations we weren't unnecessarily allowing
xmm16-xmm31 regs.  But VCVTSD2SS is already in AVX512F ISA, and the rest are
just splitters that use movs that are also in AVX512F.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-05-03  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/i386.md (*truncdfsf_mixed, *truncdfsf_i387,
	*truncxfsf2_mixed, *truncxfdf2_mixed): Use v constraint instead
	of x.

	* gcc.target/i386/avx512f-cvt-1.c: New test.


	Jakub

Comments

Uros Bizjak May 3, 2016, 11:57 a.m. UTC | #1
On Tue, May 3, 2016 at 1:25 PM, Jakub Jelinek <jakub@redhat.com> wrote:
> Hi!
>
> As the testcase shows, in some truncations we weren't unnecessarily allowing
> xmm16-xmm31 regs.  But VCVTSD2SS is already in AVX512F ISA, and the rest are
> just splitters that use movs that are also in AVX512F.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

OK.

Thanks,
Uros.

> 2016-05-03  Jakub Jelinek  <jakub@redhat.com>
>
>         * config/i386/i386.md (*truncdfsf_mixed, *truncdfsf_i387,
>         *truncxfsf2_mixed, *truncxfdf2_mixed): Use v constraint instead
>         of x.
>
>         * gcc.target/i386/avx512f-cvt-1.c: New test.
>
> --- gcc/config/i386/i386.md.jj  2016-05-02 09:22:07.000000000 +0200
> +++ gcc/config/i386/i386.md     2016-05-02 17:33:44.641288022 +0200
> @@ -4472,9 +4472,9 @@ (define_insn "*truncdfsf_fast_i387"
>     (set_attr "mode" "SF")])
>
>  (define_insn "*truncdfsf_mixed"
> -  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,x ,?f,?x,?*r")
> +  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,v ,?f,?v,?*r")
>         (float_truncate:SF
> -         (match_operand:DF 1 "nonimmediate_operand" "f ,xm,f ,f ,f")))
> +         (match_operand:DF 1 "nonimmediate_operand" "f ,vm,f ,f ,f")))
>     (clobber (match_operand:SF 2 "memory_operand"     "=X,X ,m ,m ,m"))]
>    "TARGET_MIX_SSE_I387"
>  {
> @@ -4496,7 +4496,7 @@ (define_insn "*truncdfsf_mixed"
>     (set_attr "mode" "SF")])
>
>  (define_insn "*truncdfsf_i387"
> -  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,?f,?x,?*r")
> +  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,?f,?v,?*r")
>         (float_truncate:SF
>           (match_operand:DF 1 "nonimmediate_operand" "f ,f ,f ,f")))
>     (clobber (match_operand:SF 2 "memory_operand"     "=X,m ,m ,m"))]
> @@ -4558,7 +4558,7 @@ (define_expand "truncxf<mode>2"
>  })
>
>  (define_insn "*truncxfsf2_mixed"
> -  [(set (match_operand:SF 0 "nonimmediate_operand" "=m,?f,?x,?*r")
> +  [(set (match_operand:SF 0 "nonimmediate_operand" "=m,?f,?v,?*r")
>         (float_truncate:SF
>           (match_operand:XF 1 "register_operand"   "f ,f ,f ,f")))
>     (clobber (match_operand:SF 2 "memory_operand"   "=X,m ,m ,m"))]
> @@ -4572,7 +4572,7 @@ (define_insn "*truncxfsf2_mixed"
>     (set_attr "mode" "SF")])
>
>  (define_insn "*truncxfdf2_mixed"
> -  [(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?x,?*r")
> +  [(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?v,?*r")
>         (float_truncate:DF
>           (match_operand:XF 1 "register_operand"   "f ,f ,f  ,f")))
>     (clobber (match_operand:DF 2 "memory_operand"   "=X,m ,m  ,m"))]
> --- gcc/testsuite/gcc.target/i386/avx512f-cvt-1.c.jj    2016-05-03 10:07:55.333913131 +0200
> +++ gcc/testsuite/gcc.target/i386/avx512f-cvt-1.c       2016-05-03 10:11:48.191748257 +0200
> @@ -0,0 +1,38 @@
> +/* { dg-do assemble { target { avx512f && { ! ia32 } } } } */
> +/* { dg-options "-O2 -mavx512f -mfpmath=387,sse" } */
> +
> +void
> +f1 (double *p)
> +{
> +  register float x __asm ("xmm16");
> +  x = *p;
> +  __asm volatile ("" : "+v" (x));
> +}
> +
> +void
> +f2 (void)
> +{
> +  double d;
> +  register float x __asm ("xmm16");
> +  __asm volatile ("" : "=t" (d));
> +  x = d;
> +  __asm volatile ("" : "+v" (x));
> +}
> +
> +void
> +f3 (long double *p)
> +{
> +  register float x __asm ("xmm16");
> +  x = *p;
> +  __asm volatile ("" : "+v" (x));
> +}
> +
> +void
> +f4 (void)
> +{
> +  long double d;
> +  register float x __asm ("xmm16");
> +  __asm volatile ("" : "=t" (d));
> +  x = d;
> +  __asm volatile ("" : "+v" (x));
> +}
>
>         Jakub
diff mbox

Patch

--- gcc/config/i386/i386.md.jj	2016-05-02 09:22:07.000000000 +0200
+++ gcc/config/i386/i386.md	2016-05-02 17:33:44.641288022 +0200
@@ -4472,9 +4472,9 @@  (define_insn "*truncdfsf_fast_i387"
    (set_attr "mode" "SF")])
 
 (define_insn "*truncdfsf_mixed"
-  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,x ,?f,?x,?*r")
+  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,v ,?f,?v,?*r")
 	(float_truncate:SF
-	  (match_operand:DF 1 "nonimmediate_operand" "f ,xm,f ,f ,f")))
+	  (match_operand:DF 1 "nonimmediate_operand" "f ,vm,f ,f ,f")))
    (clobber (match_operand:SF 2 "memory_operand"     "=X,X ,m ,m ,m"))]
   "TARGET_MIX_SSE_I387"
 {
@@ -4496,7 +4496,7 @@  (define_insn "*truncdfsf_mixed"
    (set_attr "mode" "SF")])
 
 (define_insn "*truncdfsf_i387"
-  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,?f,?x,?*r")
+  [(set (match_operand:SF 0 "nonimmediate_operand"   "=m,?f,?v,?*r")
 	(float_truncate:SF
 	  (match_operand:DF 1 "nonimmediate_operand" "f ,f ,f ,f")))
    (clobber (match_operand:SF 2 "memory_operand"     "=X,m ,m ,m"))]
@@ -4558,7 +4558,7 @@  (define_expand "truncxf<mode>2"
 })
 
 (define_insn "*truncxfsf2_mixed"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=m,?f,?x,?*r")
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=m,?f,?v,?*r")
 	(float_truncate:SF
 	  (match_operand:XF 1 "register_operand"   "f ,f ,f ,f")))
    (clobber (match_operand:SF 2 "memory_operand"   "=X,m ,m ,m"))]
@@ -4572,7 +4572,7 @@  (define_insn "*truncxfsf2_mixed"
    (set_attr "mode" "SF")])
 
 (define_insn "*truncxfdf2_mixed"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?x,?*r")
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=m,?f,?v,?*r")
 	(float_truncate:DF
 	  (match_operand:XF 1 "register_operand"   "f ,f ,f  ,f")))
    (clobber (match_operand:DF 2 "memory_operand"   "=X,m ,m  ,m"))]
--- gcc/testsuite/gcc.target/i386/avx512f-cvt-1.c.jj	2016-05-03 10:07:55.333913131 +0200
+++ gcc/testsuite/gcc.target/i386/avx512f-cvt-1.c	2016-05-03 10:11:48.191748257 +0200
@@ -0,0 +1,38 @@ 
+/* { dg-do assemble { target { avx512f && { ! ia32 } } } } */
+/* { dg-options "-O2 -mavx512f -mfpmath=387,sse" } */
+
+void
+f1 (double *p)
+{
+  register float x __asm ("xmm16");
+  x = *p;
+  __asm volatile ("" : "+v" (x));
+}
+
+void
+f2 (void)
+{
+  double d;
+  register float x __asm ("xmm16");
+  __asm volatile ("" : "=t" (d));
+  x = d;
+  __asm volatile ("" : "+v" (x));
+}
+
+void
+f3 (long double *p)
+{
+  register float x __asm ("xmm16");
+  x = *p;
+  __asm volatile ("" : "+v" (x));
+}
+
+void
+f4 (void)
+{
+  long double d;
+  register float x __asm ("xmm16");
+  __asm volatile ("" : "=t" (d));
+  x = d;
+  __asm volatile ("" : "+v" (x));
+}