===================================================================
@@ -1665,12 +1665,13 @@
(define_mode_iterator FPCMP [CCFP CCFPU])
(define_mode_attr unord [(CCFP "") (CCFPU "u")])
-(define_insn "*cmpi<FPCMP:unord><MODEF:mode>_mixed"
+(define_insn "*cmpi<FPCMP:unord><MODEF:mode>"
[(set (reg:FPCMP FLAGS_REG)
(compare:FPCMP
(match_operand:MODEF 0 "register_operand" "f,v")
- (match_operand:MODEF 1 "nonimmediate_operand" "f,vm")))]
- "SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH"
+ (match_operand:MODEF 1 "register_ssemem_operand" "f,vm")))]
+ "(SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH)
+ || (TARGET_80387 && TARGET_CMOVE)"
"* return output_fp_compare (insn, operands, true,
<FPCMP:MODE>mode == CCFPUmode);"
[(set_attr "type" "fcmp,ssecomi")
@@ -1689,22 +1690,27 @@
(set_attr "bdver1_decode" "double")
(set_attr "znver1_decode" "double")
(set (attr "enabled")
- (cond [(eq_attr "alternative" "0")
- (symbol_ref "TARGET_MIX_SSE_I387")
- ]
- (symbol_ref "true")))])
+ (if_then_else
+ (match_test ("SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH"))
+ (if_then_else
+ (eq_attr "alternative" "0")
+ (symbol_ref "TARGET_MIX_SSE_I387")
+ (symbol_ref "true"))
+ (if_then_else
+ (eq_attr "alternative" "0")
+ (symbol_ref "true")
+ (symbol_ref "false"))))])
-(define_insn "*cmpi<FPCMP:unord><X87MODEF:mode>_i387"
+(define_insn "*cmpi<unord>xf_i387"
[(set (reg:FPCMP FLAGS_REG)
(compare:FPCMP
- (match_operand:X87MODEF 0 "register_operand" "f")
- (match_operand:X87MODEF 1 "register_operand" "f")))]
- "TARGET_80387 && TARGET_CMOVE
- && !(SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH)"
+ (match_operand:XF 0 "register_operand" "f")
+ (match_operand:XF 1 "register_operand" "f")))]
+ "TARGET_80387 && TARGET_CMOVE"
"* return output_fp_compare (insn, operands, true,
- <FPCMP:MODE>mode == CCFPUmode);"
+ <MODE>mode == CCFPUmode);"
[(set_attr "type" "fcmp")
- (set_attr "mode" "<X87MODEF:MODE>")
+ (set_attr "mode" "XF")
(set_attr "athlon_decode" "vector")
(set_attr "amdfam10_decode" "direct")
(set_attr "bdver1_decode" "double")
@@ -9235,27 +9241,34 @@
"TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
"ix86_expand_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
-(define_insn "*absneg<mode>2_mixed"
+(define_insn "*absneg<mode>2"
[(set (match_operand:MODEF 0 "register_operand" "=x,x,f,!r")
(match_operator:MODEF 3 "absneg_operator"
[(match_operand:MODEF 1 "register_operand" "0,x,0,0")]))
(use (match_operand:<ssevecmode> 2 "nonimmediate_operand" "xm,0,X,X"))
(clobber (reg:CC FLAGS_REG))]
- "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
+ "(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
+ || TARGET_80387"
"#"
[(set (attr "enabled")
- (cond [(eq_attr "alternative" "2")
- (symbol_ref "TARGET_MIX_SSE_I387")
- ]
- (symbol_ref "true")))])
+ (if_then_else
+ (match_test ("SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"))
+ (if_then_else
+ (eq_attr "alternative" "2")
+ (symbol_ref "TARGET_MIX_SSE_I387")
+ (symbol_ref "true"))
+ (if_then_else
+ (eq_attr "alternative" "2,3")
+ (symbol_ref "true")
+ (symbol_ref "false"))))])
-(define_insn "*absneg<mode>2_i387"
- [(set (match_operand:X87MODEF 0 "register_operand" "=f,!r")
- (match_operator:X87MODEF 3 "absneg_operator"
- [(match_operand:X87MODEF 1 "register_operand" "0,0")]))
+(define_insn "*absnegxf2_i387"
+ [(set (match_operand:XF 0 "register_operand" "=f,!r")
+ (match_operator:XF 3 "absneg_operator"
+ [(match_operand:XF 1 "register_operand" "0,0")]))
(use (match_operand 2))
(clobber (reg:CC FLAGS_REG))]
- "TARGET_80387 && !(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
+ "TARGET_80387"
"#")
(define_expand "<code>tf2"
===================================================================
@@ -121,6 +121,13 @@
(match_operand 0 "nonmemory_operand")
(match_operand 0 "general_operand")))
+;; Match register operands, but include memory operands for TARGET_SSE_MATH.
+(define_predicate "register_ssemem_operand"
+ (if_then_else
+ (match_test "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH")
+ (match_operand 0 "nonimmediate_operand")
+ (match_operand 0 "register_operand")))
+
;; Match nonimmediate operands, but exclude memory operands
;; for TARGET_SSE_MATH if TARGET_MIX_SSE_I387 is not enabled.
(define_predicate "nonimm_ssenomem_operand"