diff mbox

[v2] fixup! tcg/mips: Make direct jump patching thread-safe

Message ID 1462210518-26522-1-git-send-email-sergey.fedorov@linaro.org
State New
Headers show

Commit Message

sergey.fedorov@linaro.org May 2, 2016, 5:35 p.m. UTC 
From: Sergey Fedorov <serge.fdrv@gmail.com>

Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org>
---

This patch is based on a commit:

    e601ccb62016 ("cpu-exec: Move TB chaining into tb_find_fast()")
    
from:

    https://github.com/rth7680/qemu.git tcg-next

 tcg/mips/tcg-target.inc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Richard Henderson May 2, 2016, 5:41 p.m. UTC | #1 
On 05/02/2016 07:35 AM, Sergey Fedorov wrote:
> From: Sergey Fedorov <serge.fdrv@gmail.com>
>
> Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
> Signed-off-by: Sergey Fedorov <sergey.fedorov@linaro.org>
> ---
>
> This patch is based on a commit:
>
>     e601ccb62016 ("cpu-exec: Move TB chaining into tb_find_fast()")
>
> from:
>
>     https://github.com/rth7680/qemu.git tcg-next
>
>  tcg/mips/tcg-target.inc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
> index b0440b9c5a79..50e98ea63a73 100644
> --- a/tcg/mips/tcg-target.inc.c
> +++ b/tcg/mips/tcg-target.inc.c
> @@ -1885,6 +1885,6 @@ static void tcg_target_init(TCGContext *s)
>
>  void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
>  {
> -    atomic_set(ptr, deposit32(OPC_J, 0, 26, addr >> 2));
> +    atomic_set((uint32_t *)jmp_addr, deposit32(OPC_J, 0, 26, addr >> 2));
>      flush_icache_range(jmp_addr, jmp_addr + 4);
>  }
>

Thanks.  Will fix.
diff mbox

Patch

diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index b0440b9c5a79..50e98ea63a73 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.c
@@ -1885,6 +1885,6 @@  static void tcg_target_init(TCGContext *s)
 
 void tb_set_jmp_target1(uintptr_t jmp_addr, uintptr_t addr)
 {
-    atomic_set(ptr, deposit32(OPC_J, 0, 26, addr >> 2));
+    atomic_set((uint32_t *)jmp_addr, deposit32(OPC_J, 0, 26, addr >> 2));
     flush_icache_range(jmp_addr, jmp_addr + 4);
 }