diff mbox

Improve add/sub TImode double word splitters (PR rtl-optimization/70467)

Message ID 20160502162428.GN26501@tucnak.zalov.cz
State New
Headers show

Commit Message

Jakub Jelinek May 2, 2016, 4:24 p.m. UTC
On Fri, Apr 01, 2016 at 08:29:17PM +0200, Uros Bizjak wrote:
> > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for stage1
> > (while the previous patch looks simple enough that I'd like to see it in
> > 6.x, this one IMHO can wait).
> 
> Yes, please. This is not a regression.

So, I'm reposting this patch now, bootstrapped/regtested again on
x86_64-linux and i686-linux, ok for trunk?

Had to commit the ipa-pure-const.c fix first, because in va-arg-13.c
CSE with this patch optimized away the stores in the second va_start,
assuming the (incorrectly marked pure) function call would not modify
those.

2016-05-02  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/70467
	* cse.c (cse_insn): Handle no-op MEM moves after folding.

	* gcc.target/i386/pr70467-1.c: New test.



	Jakub

Comments

Bernd Schmidt May 2, 2016, 4:40 p.m. UTC | #1
> 2016-05-02  Jakub Jelinek  <jakub@redhat.com>
>
> 	PR rtl-optimization/70467
> 	* cse.c (cse_insn): Handle no-op MEM moves after folding.
>
> 	* gcc.target/i386/pr70467-1.c: New test.

I seem to have a memory of acking this before. Certainly looks OK.


Bernd
H.J. Lu June 14, 2016, 5:07 p.m. UTC | #2
On Mon, May 2, 2016 at 9:24 AM, Jakub Jelinek <jakub@redhat.com> wrote:
> On Fri, Apr 01, 2016 at 08:29:17PM +0200, Uros Bizjak wrote:
>> > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for stage1
>> > (while the previous patch looks simple enough that I'd like to see it in
>> > 6.x, this one IMHO can wait).
>>
>> Yes, please. This is not a regression.
>
> So, I'm reposting this patch now, bootstrapped/regtested again on
> x86_64-linux and i686-linux, ok for trunk?
>
> Had to commit the ipa-pure-const.c fix first, because in va-arg-13.c
> CSE with this patch optimized away the stores in the second va_start,
> assuming the (incorrectly marked pure) function call would not modify
> those.
>
> 2016-05-02  Jakub Jelinek  <jakub@redhat.com>
>
>         PR rtl-optimization/70467
>         * cse.c (cse_insn): Handle no-op MEM moves after folding.
>
>         * gcc.target/i386/pr70467-1.c: New test.
>

This caused:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71532


H.J.
diff mbox

Patch

--- gcc/cse.c.jj	2016-04-01 17:21:25.615271730 +0200
+++ gcc/cse.c	2016-04-01 17:31:27.705243745 +0200
@@ -4575,6 +4575,7 @@  cse_insn (rtx_insn *insn)
   for (i = 0; i < n_sets; i++)
     {
       bool repeat = false;
+      bool mem_noop_insn = false;
       rtx src, dest;
       rtx src_folded;
       struct table_elt *elt = 0, *p;
@@ -5166,7 +5167,7 @@  cse_insn (rtx_insn *insn)
 	    }
 
 	  /* Avoid creation of overlapping memory moves.  */
-	  if (MEM_P (trial) && MEM_P (SET_DEST (sets[i].rtl)))
+	  if (MEM_P (trial) && MEM_P (dest) && !rtx_equal_p (trial, dest))
 	    {
 	      rtx src, dest;
 
@@ -5277,6 +5278,21 @@  cse_insn (rtx_insn *insn)
 	      break;
 	    }
 
+	  /* Similarly, lots of targets don't allow no-op
+	     (set (mem x) (mem x)) moves.  */
+	  else if (n_sets == 1
+		   && MEM_P (trial)
+		   && MEM_P (dest)
+		   && rtx_equal_p (trial, dest)
+		   && !side_effects_p (dest)
+		   && (cfun->can_delete_dead_exceptions
+		       || insn_nothrow_p (insn)))
+	    {
+	      SET_SRC (sets[i].rtl) = trial;
+	      mem_noop_insn = true;
+	      break;
+	    }
+
 	  /* Reject certain invalid forms of CONST that we create.  */
 	  else if (CONSTANT_P (trial)
 		   && GET_CODE (trial) == CONST
@@ -5494,6 +5510,16 @@  cse_insn (rtx_insn *insn)
 	  /* No more processing for this set.  */
 	  sets[i].rtl = 0;
 	}
+
+      /* Similarly for no-op MEM moves.  */
+      else if (mem_noop_insn)
+	{
+	  if (cfun->can_throw_non_call_exceptions && can_throw_internal (insn))
+	    cse_cfg_altered = true;
+	  delete_insn_and_edges (insn);
+	  /* No more processing for this set.  */
+	  sets[i].rtl = 0;
+	}
 
       /* If this SET is now setting PC to a label, we know it used to
 	 be a conditional or computed branch.  */
--- gcc/testsuite/gcc.target/i386/pr70467-1.c.jj	2016-04-01 17:28:20.297742549 +0200
+++ gcc/testsuite/gcc.target/i386/pr70467-1.c	2016-04-01 17:28:20.297742549 +0200
@@ -0,0 +1,55 @@ 
+/* PR rtl-optimization/70467 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mno-sse" } */
+
+void foo (unsigned long long *);
+
+void
+bar (void)
+{
+  unsigned long long a;
+  foo (&a);
+  a &= 0x7fffffffffffffffULL;
+  foo (&a);
+  a &= 0xffffffff7fffffffULL;
+  foo (&a);
+  a &= 0x7fffffff00000000ULL;
+  foo (&a);
+  a &= 0x000000007fffffffULL;
+  foo (&a);
+  a &= 0x00000000ffffffffULL;
+  foo (&a);
+  a &= 0xffffffff00000000ULL;
+  foo (&a);
+  a |= 0x7fffffffffffffffULL;
+  foo (&a);
+  a |= 0xffffffff7fffffffULL;
+  foo (&a);
+  a |= 0x7fffffff00000000ULL;
+  foo (&a);
+  a |= 0x000000007fffffffULL;
+  foo (&a);
+  a |= 0x00000000ffffffffULL;
+  foo (&a);
+  a |= 0xffffffff00000000ULL;
+  foo (&a);
+  a ^= 0x7fffffffffffffffULL;
+  foo (&a);
+  a ^= 0xffffffff7fffffffULL;
+  foo (&a);
+  a ^= 0x7fffffff00000000ULL;
+  foo (&a);
+  a ^= 0x000000007fffffffULL;
+  foo (&a);
+  a ^= 0x00000000ffffffffULL;
+  foo (&a);
+  a ^= 0xffffffff00000000ULL;
+  foo (&a);
+}
+
+/* { dg-final { scan-assembler-not "andl\[ \t\]*.-1," { target ia32 } } } */
+/* { dg-final { scan-assembler-not "andl\[ \t\]*.0," { target ia32 } } } */
+/* { dg-final { scan-assembler-not "orl\[ \t\]*.-1," { target ia32 } } } */
+/* { dg-final { scan-assembler-not "orl\[ \t\]*.0," { target ia32 } } } */
+/* { dg-final { scan-assembler-not "xorl\[ \t\]*.-1," { target ia32 } } } */
+/* { dg-final { scan-assembler-not "xorl\[ \t\]*.0," { target ia32 } } } */