| Message ID | 1461324197-1333-1-git-send-email-zajec5@gmail.com |
|---|---|
| State | Accepted |
| Headers | show |
On Fri, 22 Apr 2016 13:23:13 +0200 Rafał Miłecki <zajec5@gmail.com> wrote: > So far it was only possible to specify ECC algorithm using "soft" and > "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify > it for a hardware ECC mode. > > Now that we have independent field in NAND subsystem for storing info > about ECC algorithm we may also add support for this new DT property. > > Signed-off-by: Rafał Miłecki <zajec5@gmail.com> > --- > Documentation/devicetree/bindings/mtd/nand.txt | 2 ++ > drivers/mtd/nand/nand_base.c | 20 +++++++++++++------- > 2 files changed, 15 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt > index a17662b..5ac4ab7 100644 > --- a/Documentation/devicetree/bindings/mtd/nand.txt > +++ b/Documentation/devicetree/bindings/mtd/nand.txt > @@ -22,6 +22,8 @@ Optional NAND chip properties: > - nand-ecc-mode : String, operation mode of the NAND ecc mode. > Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", > "soft_bch". > +- nand-ecc-algo: string, algorithm of NAND ECC. > + Supported values are: "hamming", "bch". Rob, any objection to this binding change (and the one in patch 3). Please note that everything is backward compatible. Thanks, Boris > - nand-bus-width : 8 or 16 bus width if not present 8 > - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false > > diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c > index 7bc37b4..a5417a0 100644 > --- a/drivers/mtd/nand/nand_base.c > +++ b/drivers/mtd/nand/nand_base.c > @@ -4003,17 +4003,23 @@ static int of_get_nand_ecc_mode(struct device_node *np) > return -ENODEV; > } > > +static const char * const nand_ecc_algos[] = { > + [NAND_ECC_HAMMING] = "hamming", > + [NAND_ECC_BCH] = "bch", > +}; > + > static int of_get_nand_ecc_algo(struct device_node *np) > { > const char *pm; > - int err; > + int err, i; > > - /* > - * TODO: Read ECC algo OF property and map it to enum nand_ecc_algo. > - * It's not implemented yet as currently NAND subsystem ignores > - * algorithm explicitly set this way. Once it's handled we should > - * document & support new property. > - */ > + err = of_property_read_string(np, "nand-ecc-algo", &pm); > + if (!err) { > + for (i = 0; i < ARRAY_SIZE(nand_ecc_algos); i++) > + if (!strcasecmp(pm, nand_ecc_algos[i])) > + return i; > + return -ENODEV; > + } > > /* > * For backward compatibility we also read "nand-ecc-mode" checking
On Fri, Apr 22, 2016 at 01:23:13PM +0200, Rafał Miłecki wrote: > So far it was only possible to specify ECC algorithm using "soft" and > "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify > it for a hardware ECC mode. > > Now that we have independent field in NAND subsystem for storing info > about ECC algorithm we may also add support for this new DT property. > > Signed-off-by: Rafał Miłecki <zajec5@gmail.com> > --- > Documentation/devicetree/bindings/mtd/nand.txt | 2 ++ > drivers/mtd/nand/nand_base.c | 20 +++++++++++++------- > 2 files changed, 15 insertions(+), 7 deletions(-) Acked-by: Rob Herring <robh@kernel.org>
On Fri, 22 Apr 2016 13:23:13 +0200 Rafał Miłecki <zajec5@gmail.com> wrote: > So far it was only possible to specify ECC algorithm using "soft" and > "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify > it for a hardware ECC mode. > > Now that we have independent field in NAND subsystem for storing info > about ECC algorithm we may also add support for this new DT property. > > Signed-off-by: Rafał Miłecki <zajec5@gmail.com> > --- > Documentation/devicetree/bindings/mtd/nand.txt | 2 ++ > drivers/mtd/nand/nand_base.c | 20 +++++++++++++------- > 2 files changed, 15 insertions(+), 7 deletions(-) Applied, thanks. Boris
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt index a17662b..5ac4ab7 100644 --- a/Documentation/devicetree/bindings/mtd/nand.txt +++ b/Documentation/devicetree/bindings/mtd/nand.txt @@ -22,6 +22,8 @@ Optional NAND chip properties: - nand-ecc-mode : String, operation mode of the NAND ecc mode. Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", "soft_bch". +- nand-ecc-algo: string, algorithm of NAND ECC. + Supported values are: "hamming", "bch". - nand-bus-width : 8 or 16 bus width if not present 8 - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 7bc37b4..a5417a0 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -4003,17 +4003,23 @@ static int of_get_nand_ecc_mode(struct device_node *np) return -ENODEV; } +static const char * const nand_ecc_algos[] = { + [NAND_ECC_HAMMING] = "hamming", + [NAND_ECC_BCH] = "bch", +}; + static int of_get_nand_ecc_algo(struct device_node *np) { const char *pm; - int err; + int err, i; - /* - * TODO: Read ECC algo OF property and map it to enum nand_ecc_algo. - * It's not implemented yet as currently NAND subsystem ignores - * algorithm explicitly set this way. Once it's handled we should - * document & support new property. - */ + err = of_property_read_string(np, "nand-ecc-algo", &pm); + if (!err) { + for (i = 0; i < ARRAY_SIZE(nand_ecc_algos); i++) + if (!strcasecmp(pm, nand_ecc_algos[i])) + return i; + return -ENODEV; + } /* * For backward compatibility we also read "nand-ecc-mode" checking
So far it was only possible to specify ECC algorithm using "soft" and "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify it for a hardware ECC mode. Now that we have independent field in NAND subsystem for storing info about ECC algorithm we may also add support for this new DT property. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> --- Documentation/devicetree/bindings/mtd/nand.txt | 2 ++ drivers/mtd/nand/nand_base.c | 20 +++++++++++++------- 2 files changed, 15 insertions(+), 7 deletions(-)